uPD789074 Subseries 8-Bit Single-Chip Microcontrollers UD - Home

CHAPTER 9 SERIAL INTERFACE 20(b) Generation of baud rate transmit/receive clock from external clock input from ASCK20 pinThe transmit/receive clock is generated by dividing the clock input from the ASCK20 pin. The baud rateof a clock generated from the clock input from the ASCK20 pin is estimated by using the followingexpression.[Baud rate] =fASCK16[bps]fASCK: Frequency of clock input from the ASCK20 pinTable 9-4.Relationship Between ASCK20 Pin Input Frequencyand Baud Rate (When BRGC20 Is Set to 80H)Baud Rate (bps)ASCK20 Pin Input Frequency (kHz)75 1.2150 2.4300 4.8600 9.61,200 19.22,400 38.44,800 76.89,600 153.619,200 307.231,250 500.038,400 614.4(c) Generation of serial clock in 3-wire serial I/O mode from system clockThe serial clock is generated by dividing the system clock. The serial clock frequency is estimated byusing the following expression. BRGC20 does not need to be set when an external serial clock is inputto the SCK20 pin.Serial clock frequency =fX2 n+1[Hz]fX: System clock oscillation frequencyn: Value (shown in Figure 9-6) determined by setting TPS200 through TPS203 (1≤ n ≤ 8)User’s Manual U14801EJ3V1UD 125