uPD789074 Subseries 8-Bit Single-Chip Microcontrollers UD - Home

CHAPTER 15 ELECTRICAL SPECIFICATIONS (EXPANDED-SPECIFICATION PRODUCTS)Data Memory STOP Mode Low Supply Voltage Data Retention Characteristics (TA = −40 to +85°C)Parameter Symbol Conditions MIN. TYP. MAX. UnitData retention powersupply voltageVDDDR 1.8 5.5 VRelease signal set time tSREL 0 µsOscillation stabilizationwait time Note 1tWAITRelease by RESET 2 15 /fX msRelease by interrupt request Note 2 msNotes 1. Oscillation stabilization wait time is the time in which the CPU operation is stopped to prevent unstableoperation when oscillation is started.2. Selection of 2 12 /fX, 2 15 /fX, and 2 17 /fX is possible using bits 0 to 2 (OSTS0 to OSTS2) of the oscillationstabilization time select register (OSTS).RemarkfX: System clock oscillation frequencyData Retention Timing (STOP Mode Release by RESET)Internal reset operationHALT modeSTOP modeOperation modeData retention modeVDDVDDDRtSRELSTOP instruction executionRESETtWAITData Retention Timing (Standby Release Signal: STOP Mode Release by Interrupt Signal)HALT modeSTOP modeOperation modeData retention modeVDDVDDDRtSRELSTOP instruction executionStandby release signal(interrupt request)tWAITUser’s Manual U14801EJ3V1UD 207