ARCHIVE 2009 - BiTS Workshop

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2009Session 3Adventures in Test & Burn-in OperationsProposed Usage• Integrated test socket for final test andmechanical reliability test Power cyclefor 5 days ATE• Multiple cell stand-alone system for burnintest and mechanical reliability test Periodically to test socket and ATE3/2009 Mechanical Reliability Test as Part of Final Test of a Packaged Chip 19Conclusions• Time Effective Power Cycle SystemPossible• BeCe contact element meets requirements:– Low and stable resistance– High service temperature– High current– High frequency– Large array– Fine contact pitch3/2009 Mechanical Reliability Test as Part of Final Test of a Packaged Chip 20Paper #3March 8 - 11, 200910
2009Session 3Adventures in Test & Burn-in OperationsSubstrate Bias:Application in Final Test andBurn-in of High-Power CPU’sMax ParanskyTexas Instruments2009 BiTS WorkshopMarch 8 - 11, 2009High-Power Burn-inConditions determined by process technologyand reliability requirements:• Chip area coverage> Exercise all key structures (logic, memory, IO’s)• Time duration• Voltage levels> All transistors types powered above their normaluse conditions• Temperature> Silicon Tj above use conditions3/2009 Substrate Bias: Application in Final Test and Burn-in of High-Power CPU’s 2Paper #4March 8 - 11, 20091
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