ARCHIVE 2009 - BiTS Workshop

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2009Session 3Adventures in Test & Burn-in OperationsTest and System• ATE> High speed / high power testing pushes coolingcapability of handlers• End system> High speed / high power real applications push systemcooling capabilities3/2009 Substrate Bias: Application in Final Test and Burn-in of High-Power CPU’s 11Mechanism Revisited• Idsat α (Vgs – Vt)> Fixed Vgs (Vdd) and adjustable Vt:a) Modulate Idsat and total DUT powerb) Modulate switching time and overall chipperformance (max frequency)3/2009 Substrate Bias: Application in Final Test and Burn-in of High-Power CPU’s 12Paper #4March 8 - 11, 20096
2009Session 3Adventures in Test & Burn-in OperationsFrequency ApplicationsDUTs too slowApply forwardbias to speedupVnw < VddVsb > VssDesiredDistributionActualDistributionDUTs too high-powerApply reversebias forcoolingVnw > VddVsb < VssDUT frequency3/2009 Substrate Bias: Application in Final Test and Burn-in of High-Power CPU’s 13Tester Frequency DataOn average 4% of DUT frequency gained by forwardsubstrate biasVnw = Vdd - 0.3VVsb = 0.3V12.0%10.0%8.0%6.0%4.0%2.0%0.0%-2.0%Forward Substrate BiasFrequency GainDUTs3/2009 Substrate Bias: Application in Final Test and Burn-in of High-Power CPU’s 14Paper #4March 8 - 11, 20097
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