Jens Janssen Diploma Thesis - Prof. Dr. Norbert Wermes ...

Figure 3.7: The hit logic is part of the analog pixel block [11]. The hit signalcan be sent through the global hitbus (OR’ed with all other readout channels)and is available on an output pad of the FE-I3. The hitbus signal can be usedfor internal self-triggering (see section 4.6). A specific circuit is implemented totest the digital functionality of the FE-I3 (DigStrobe).3.3.3 Digital Pixel BlockThe digital pixel block generates the hit information and preserves the datauntil transmitted to the CAU in the chip periphery.A block diagram of the digital pixel block is shown in figure 3.8. The binaryhit signal is received by a circuit denoted as di erentiator. The di erentiatorgenerates two short signals at the leading edge (LE) and trailing edge (TE) ofthe hit signal. Each signal causes that the current 8-bit Gray-coded time stampis saved to either the LE RAM or TE RAM, respectively. The time stamp (TSI)is received via the timing bus and is increased by one every 25 ns according tothe bunch crossing frequency of 40 MHz. The signal in coincidence with the TEalso asserts a read request that is sent to the CAU. Then the CAU starts thereadout of the hit information. The hit information (or data) comprises the LEand TE time stamps and the row address 5 . If more than one pixel saw a hit,the CAU starts a readout sequence determined by priority logic. As long asthe hit information has not been read out, the digital pixel block is not able toprocess any other hit signal. A freeze signal prevents sending out of hit dataof a pixel cell with higher priority that just received a hit while a pixel cellwith lower priority communicates with the CAU. After finishing the readout ofa pixel cell (read signal is de-asserted), the readout of a pixel cell with highestpriority, which contains hit data, begins.3.3.4 Chip PeripheryThe chip periphery contains the CAU, the ROC and a EOC bu er for eachcolumn pair. The following paragraphs will only give a brief description of thefunctionality implemented in the periphery. An introduction into the functionalityis needed to understand how the data, which is sent out to the readoutsystem, is generated. More detailed information can be found in [11, 13].The task of the CAU is to receive the Gray-coded hit information. In secondstep, the Gray-coded hit information is converted to the binary format and theToT information is calculated by subtracting the TE time stamp from the LEtime stamp. The ToT information is associated to the LE time stamp.Hits that are a ected by a timewalk e ect can be discarded or doubled bythe CAU. More details can be found in section 5.9.2.5 The column address is determined by the CAU.19