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SPIRE Design Description - Research Services

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Draft <strong>SPIRE</strong> <strong>Design</strong> <strong>Description</strong> Document<br />

(i) more frequent cooler recycling including the possibility of autonomous recycling under control of<br />

the DPU alone;<br />

(ii) slow chop mode in the event of partial BSM failure;<br />

(iii) open loop BSM control using commanded current to the actuators;<br />

(iv) single axis BSM operation;<br />

(v) slow scanning of FTS mirrors;<br />

(vi) step and look operation of the FTS in conjunction with the BSM;<br />

(vii) open loop operation of the FTS mechanism by commanding the current to the actuator;<br />

(viii) DC operation of photometer calibrator this will allow V-I’s on detectors under different loadings for<br />

calibration;<br />

(ix) selection of smaller numbers of detectors from photometer arrays in event of telemetry bandwidth<br />

problems;<br />

(x) selection of smaller number of spectrometer detectors in event of problems with telemetry<br />

bandwidth and/or loss of spectrometer calibrator.<br />

3.9 Redundancy scheme<br />

The general design philosophy of the instrument, as far as is possible, is that the total failure of a single subsystem<br />

will does not lead to the total loss of instrument operations. In order to achieve this, <strong>SPIRE</strong> has been<br />

designed with both a prime and a redundant side to the instrument. There is no electrical cross strapping<br />

between these two sides of the instrument, except at the <strong>SPIRE</strong>/Herschel data interface where both the Prime<br />

and Redundant HSDPU subsystems are each connected to the Prime and the Redundant Herschel<br />

MIL-STD-1553 data buses (See Figure 3-2). Normally, to switch between the prime and redundant sides of<br />

the instrument, the spacecraft sends appropriate commands on the MIL-STD-1553 bus to the HSDPU to<br />

firstly shut down the HSFCU and then to prepare itself for shut down. Once the HSDPU is ready, the two<br />

prime spacecraft level LCLs in the HPDU that power the HSDPU and HSMCU are unlatched and the Prime<br />

side is then shut down. The two redundant LCLs are then latched and the Redundant HSDPU and HSFCU<br />

are powered up. Due to impracticalities, some systems (for example, the 3 He Cooler) are not duplicated. In<br />

these cases, either the Prime or Redundant side of the instrument can control them. Importantly, in the signal<br />

detection subsystems, there is no redundancy in the detectors, the JFETs and the Lock-in Amplifiers. The<br />

specific redundancy scheme adopted for each sub-system is described in Table 3-1. Figure 3-2 illustrates the<br />

redundancy in the Warm Electronics. Figure 3-1 shows the redundancy in the FPU subsystems. It can be<br />

seen that the cryogenic bulkhead connectors J10 and J11 on the CVV wall are harnessed to the prime Filter<br />

Boxes (and from there the prime subsystems) Connectors J12 and J13 are connected to the redundant Filter<br />

Boxes and the redundant subsystems.<br />

3.10 System budgets<br />

A summary of the various budget allocations to <strong>SPIRE</strong> are summarised below in Table 3-4 .<br />

Table 3-4 - <strong>SPIRE</strong> Budget allocations<br />

Item Budget Allocation<br />

Focal Plane Mass Budget 57.6kg<br />

SVM Mass Budget 30kg<br />

FPU Stage 0 Thermal Load 10 mW average 100 mW peak<br />

FPU Stage 1 Thermal Load 25 mW average 100 mW peak<br />

JFB Stage 2 Thermal Load 33 mW average 200 mW peak<br />

WE dissipation to SVM 86 W<br />

Data transmission from HSDPU to CMDS 100 kbps<br />

56

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