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SPIRE Design Description - Research Services

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Draft <strong>SPIRE</strong> <strong>Design</strong> <strong>Description</strong> Document<br />

monitoring capability for safety purpose. As illustrated below the DRCU has electrical<br />

interfaces with:<br />

• the FPU<br />

• the DPU<br />

• the PDU (S/C)<br />

• the EGSE (for shutter ground test only)<br />

The DRCU is composed of two subsystems; the Detector Control Unit (DCU) and the FPU Control Unit<br />

(FCU) which are both housed in a single box. Each system has analogue interfaces with the systems in the<br />

CVV and digital interfaces with the DPU for the transfer of scientific data, telemetry and<br />

commands/acknowledge packets. There is no electrical connection between the DCU and FCU.<br />

A common SMPS (with several outputs) is part of the DRCU box. The secondary output lines of this SMPS<br />

supply the sub-systems via distribution electronics whose function it is to monitor the current consumption<br />

of each sub-system and enables switching off in case of over current.<br />

Electrical interfaces with the FPU are located in the front cover of each board while interface with DPU are<br />

located in the rear cover of the DRCU box : this configuration minimizes wiring length and risk of cross-talk<br />

of sensitive analogue signals of the FPU/DRCU interface.<br />

4.1.2.2 Mechanisms Control Unit MCU<br />

The MCU controls and monitors the two mechanisms of the <strong>SPIRE</strong> instrument, viz.:<br />

(i) the Spectrometer Mechanism (SMEC). The control is typically based on a scan at a configurable<br />

speed, but can be set-up on the basis of a step position control in case on use of the step and<br />

integrate mode of the instrument;<br />

(ii) the chopper and jiggle axis of the Beam Steering Mirror subsystem . The control is a position step<br />

control pattern.<br />

The position and rate control of the 3 axes is performed by an Analog Devices 21020 DSP chip using PID<br />

control architecture. The MCU software is based on a master scheduler using the principle of time sharing<br />

without a specific multi tasking kernel. The tasks to be performed shall be called on the basis of a software<br />

interrupt generated by the inner DSP timer. The software interrupt defines the global sampling time (ie the<br />

computation cycle) of the DSP tasks at a programmable rate of between 100 and 300 µs. During each cycle,<br />

the following tasks are performed :<br />

(i) the SMEC control loop task<br />

(ii) the BSM chop control loop task,<br />

(iii) the BSM jiggle control loop task,<br />

(iv) the communication with the command line and other various internal DSP tasks.<br />

The scan parameters are put in memory for configuration purpose with a command bi-directional serial line.<br />

The MCU receives commands from the DPU via a 32-bit, bi-directional serial interface. The MCU also<br />

sends three types of data back to the DPU:<br />

(i) H/K Data: which consists of the readout of single variables read by the command line at a rate of<br />

about 1 Hz. The H/K variables readout by a get_parameter command from the DPU. The delay<br />

between transmission of a H/K readout request and the response is about 500 µs. Typical H/K<br />

variables include, mean SMEC scan speed, SMEC control status, SMEC encoder status, Chopper<br />

mean position, Jiggle mean position etc.<br />

(ii) Trace Data: The trace data is a buffer in the DSP memory which contains a long data acquisition.<br />

The number of trace variables, the sampling time, the length of the data buffer are programmable.<br />

This buffer can be read off-line, i.e. when the DPU sends a dedicated command for each varaible.<br />

Typically, the trace data mode shall be used for the scanning of large number of samples for<br />

engineering purposes;<br />

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