CME34M Hardware Manual - RTD Embedded Technologies, Inc.

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Selecting the Stack Order for the CME34M There are several things to consider when selecting the order of boards in the stack. Before selecting the order, be sure to determine which bus connector on each board is the “Active” bus. Typically, if a peripheral module has both PCIe and PCI bus connectors, only the PCIe is active and the PCI is pass-through. The following is a list of rules to use to determine the stack order: 1. The PCIe connectors above and below the CPU have completely separate signals. Therefore it is possible to attach boards to the PCIe connector above and below the CPU. 2. Any board that uses a PCIe or SATA link must be within six boards of the CPU. 3. To preserve power integrity, it is recommended that there be no more than six boards between the CPU and the power supply. 4. In order to maintain maximum performance over the full temperature range, it is recommended that a PCIe spacer be used between the CPU and any board immediately above it. 5. A maximum of four PCI boards may be attached to any PCI bus. 6. The PCIe to PCI bridge must be at one end of the PCI bus segment, and all of the peripheral cards at the other end. There may be up to eight PCI pass-through connectors between the PCIe to PCI bridge and the peripheral cards. 7. There must be no more than two boards between the first PCI peripheral and the last PCI peripheral. If there are four PCI peripheral cards in a PCI bus segment, there may not be any PCI pass-through connections between them. 18 CME34M cpuModule BDM-610000076 Rev A
Stack Example The figure below shows an example of a complete system stack. Most systems will be a subset of this example. This example stack may be further expanded with PCIe to PCIe bridges, or a PCIe to PCI bridge. Unconnected & Unused PCI Bus Segment No more than eight PCI Pass-Through Connectors All four PCI Peripherals together USB Peripheral PCIe USB Peripheral PCIe PCIe x1 Peripheral PCIe PCIe x1 Peripheral PCIe PCIe x1 Peripheral with pass-through PCI PCI PCIe PCIe x1 Peripheral with pass-through PCI PCI PCIe SATA Hard Drive Carrier PCIe Spacer PCIe CME34M CPU PCIe PCIe x4Peripheral PCIe PCIe x1 Peripheral PCIe PCIe x1 Peripheral PCIe PCIe x1 Peripheral PCIe PCIe x1 to PCI Bridge PCI PCIe Power Supply PCI PCIe USB Peripheral with pass-through PCI PCI PCIe USB Peripheral with pass-through PCI PCI PCIe PCI Peripheral PCI PCI Peripheral with pass-through ISA PCI ISA PCI Peripheral with pass-through ISA PCI ISA PCI Peripheral with pass-through ISA PCI ISA Unconnected & Unused ISA Bus Segment PCIe and SATA within six boards of CPU Spacer to improve cooling. PCIe and SATA within six boards of CPU, no more than six boards between CPU and power supply. Figure 4 System Stacking Example BDM-610000076 Rev A Chapter 2: Getting Started 19
Page 1 and 2: CME34M cpuModules User’s Manual B
Page 3 and 4: CME34M cpuModules www.rtd.com ISO90
Page 5 and 6: Chapter 1 Introduction Table of Con
Page 7 and 8: Wake-on-aDIO . . . . . . . . . . .
Page 9 and 10: Chapter 1 Introduction This manual
Page 11 and 12: Enhanced Intel SpeedStep (Core 2 Du
Page 13 and 14: Board Features • Penryn Processor
Page 15 and 16: - Match Mode Interrupt generates an
Page 17 and 18: Specifications Physical Characteris
Page 19 and 20: Table 4 Electrical Characteristics
Page 21 and 22: Chapter 2 Getting Started For many
Page 23: Table 5 CME34M Basic Connectors Con
Page 27 and 28: Connecting the Utility Cable The mu
Page 29 and 30: Chapter 3 Connecting the cpuModule
Page 31 and 32: Table 6 CME34M Basic Connectors Con
Page 33 and 34: Utility Port Connector (CN5) The ut
Page 35 and 36: Battery Pin 9 of the multi-function
Page 37 and 38: SATA Disk Chip Socket (U6) The SATA
Page 39 and 40: Facing the serial port’s connecto
Page 41 and 42: Dual Serial Port Modes The serial p
Page 43 and 44: Advanced Digital I/O (aDIO) Port (C
Page 45 and 46: Ethernet (10/100/1000Base-T and -TX
Page 47 and 48: Table 26 PCIe/104 Type 2 Bus Signal
Page 49 and 50: PCIe Link Configuration This cpuMod
Page 51 and 52: Chapter 4 Using the cpuModule This
Page 53 and 54: Main Menu Setup Fields The followin
Page 55 and 56: I/O Address Map As with all standar
Page 57 and 58: Non-Standard Serial Port Modes It i
Page 59 and 60: Table 45 DIO-Control I/O Address 9C
Page 61 and 62: Figure 6 aDIO Match Mode Strobe Mod
Page 63 and 64: Table 50 Real Time Clock Registers
Page 65 and 66: Thermal Management The cpuModule ha
Page 67 and 68: • Resume on RTC Alarm: The RTC Al
Page 69 and 70: Reset Status Register The cpuModule
Page 71 and 72: Features and Settings That Can Affe
Page 73 and 74: Appendix A Hardware Reference This
Page 75 and 76:
Figure 9 CME34M Jumper Locations (t
Page 77 and 78:
Physical Dimensions Figure 10 shows
Page 79 and 80:
Appendix B Troubleshooting Many pro
Page 81 and 82:
Table 66 Troubleshooting (cont’d)
Page 83 and 84:
Appendix C IDAN Dimensions and Pino
Page 85 and 86:
External I/O Connections Table 67 P
Page 87 and 88:
BDM-610000076 Rev A Appendix C: IDA
Page 89 and 90:
Table 72 USB — 9-Pin D Connector
Page 91 and 92:
Appendix D Additional Information A
Page 93 and 94:
Appendix E Limited Warranty RTD Emb
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