CME34M Hardware Manual - RTD Embedded Technologies, Inc.

Advanced Digital I/O Ports (aDIO)
This board supports 12 bits of TTL/CMOS compatible digital I/O (TTL signaling). These I/O lines are grouped
into two ports, Port 0 and Port 1. Port 0 is bit programmable; Port 1 is byte programmable. Port 0 supports RTD’s
Advanced Digital Interrupt modes. The three modes are strobe, match and event. Strobe mode generates an
interrupt and latches Port 0 when the strobe input transitions from low to high. Match mode generates an
interrupt when an 8-bit pattern is received in parallel that matches the match mask register. Event mode
generates an interrupt when a change occurs on any bit. In any mode, masking can be used to monitor selected
lines.
When the CPU boots, all digital I/O lines are programmed as inputs, meaning that the digital I/O line’s initial
state is undetermined. If the digital I/O lines must power up to a known state, an external 10 kΩ resistor must
be added to pull the line high or low.
The 8-bit control read/write registers for the digital I/O lines are located from I/O address 9C0h to 9C4h. These
registers are written to zero upon power up. From 9C0h to 9C4h, the name of these registers are Port 0 data,
Port 1 data, Multi-Function, DIO-Control, and Wake Control register.
Note RTD provides drivers that support the aDIO interface on popular operating systems. RTD
recommends using these drivers instead of accessing the registers directly.
Digital I/O Register Set
Table 42
Port 0 Data I/O Address 9C0h
D7 D6 D5 D4 D3 D2 D1 D0
P0.7 P0.6 P0.5 P0.4 P0.3 P0.2 P0.1 P0.0
Port 0 Data register is a read/write bit direction programmable register. A particular bit can be set to input or
output. A read of an input bit returns the value of port 0. A read of an output bit returns the last value written
to Port 0. A write to an output bit sends that value to port 0.
Table 43
Port 1 Data I/O Address 9C1h
D7 D6 D5 D4 D3 D2 D1 D0
Reserved Reserved Reserved Reserved P1.3 P1.2 P1.1 P1.0
Port 1 Data register is a read/write byte direction programmable register. A read on this register when it is
programmed to input will read the value at the aDIO connector. A write on this register when it is programmed
as output will write the value to the aDIO connector. A read on this register when it is set to output will read the
last value sent to the aDIO connector.
Table 44
Multi-Function I/O Address 9C2h
D7 D6 D5 D4 D3 D2 D1 D0
The multi-function register is a read/write register whose contents are set by the DIO-Control register. See the
DIO-Control register description for a description of this register.
60 CME34M cpuModule BDM-610000076 Rev A