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PIC24HJ64 Datasheet

PIC24HJ64 Datasheet

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PIC24HJ32GP302/304, <strong>PIC24HJ64</strong>GPX02/X04, AND PIC24HJ128GPX02/X04<br />

15.0 SERIAL PERIPHERAL<br />

INTERFACE (SPI)<br />

Note:<br />

This data sheet summarizes the features<br />

of the PIC24HJ32GP302/304,<br />

<strong>PIC24HJ64</strong>GPX02/X04,<br />

and<br />

PIC24HJ128GPX02/X04 families of<br />

devices. It is not intended to be a<br />

comprehensive reference source. To<br />

complement the information in this data<br />

sheet, refer to the PIC24H Family<br />

Reference Manual, “Section 18. Serial<br />

Peripheral Interface (SPI)” (DS70243),<br />

which is available from the Microchip<br />

website (www.microchip.com).<br />

The Serial Peripheral Interface (SPI) module is a<br />

synchronous serial interface useful for communicating<br />

with other peripheral or microcontroller devices. These<br />

peripheral devices can be serial EEPROMs, shift<br />

registers, display drivers, analog-to-digital converters,<br />

etc. The SPI module is compatible with SPI and SIOP<br />

from Motorola ® .<br />

Each SPI module consists of a 16-bit shift register,<br />

SPIxSR (where x = 1 or 2), used for shifting data in and<br />

out, and a buffer register, SPIxBUF. A control register,<br />

SPIxCON, configures the module. Additionally, a status<br />

register, SPIxSTAT, indicates status conditions.<br />

The serial interface consists of 4 pins:<br />

• SDIx (serial data input)<br />

• SDOx (serial data output)<br />

• SCKx (shift clock input or output)<br />

• SSx (active low slave select).<br />

In Master mode operation, SCK is a clock output. In<br />

Slave mode, it is a clock input.<br />

FIGURE 15-1:<br />

SPI MODULE BLOCK DIAGRAM<br />

SCKx<br />

SSx<br />

SDOx<br />

Sync<br />

Control<br />

Control<br />

Clock<br />

Shift Control<br />

Select<br />

Edge<br />

1:1 to 1:8<br />

Secondary<br />

Prescaler<br />

1:1/4/16/64<br />

Primary<br />

Prescaler<br />

FCY<br />

SPIxCON1<br />

SPIxCON1<br />

SDIx<br />

bit 0<br />

SPIxSR<br />

Enable<br />

Master Clock<br />

Transfer<br />

Transfer<br />

SPIxRXB<br />

SPIxTXB<br />

SPIxBUF<br />

Read SPIxBUF<br />

Write SPIxBUF<br />

16<br />

Internal Data Bus<br />

© 2008 Microchip Technology Inc. Preliminary DS70293B-page 167

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