PIC24HJ64 Datasheet

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PIC24HJ32GP302/304, <strong>PIC24HJ64</strong>GPX02/X04, AND PIC24HJ128GPX02/X04 TABLE 27-41: COMPARATOR MODULE SPECIFICATIONS Standard Operating Conditions: 3.0V to 3.6V DC CHARACTERISTICS (unless otherwise stated) Operating temperature -40°C ≤ TA ≤ +85°C for Industrial -40°C ≤ TA ≤ +125°C for Extended Param No. Symbol Characteristic Min. Typ Max. Units Conditions D300 VIOFF Input Offset Voltage (1) — ±10 — mV D301 VICM Input Common Mode Voltage (1) 0 — AVDD-1.5V V D302 CMRR Common Mode Rejection Ratio (1) -54 — — dB Note 1: Parameters are characterized but not tested. TABLE 27-42: COMPARATOR REFERENCE VOLTAGE SETTLING TIME SPECIFICATIONS Standard Operating Conditions: 3.0V to 3.6V AC CHARACTERISTICS (unless otherwise stated) Operating temperature -40°C ≤ TA ≤ +85°C for Industrial -40°C ≤ TA ≤ +125°C for Extended Param No. Symbol Characteristic Min. Typ Max. Units Conditions VR310 TSET Settling Time (1) — — 10 μs Note 1: Setting time measured while CVRR = 1 and CVR3:CVR0 bits transition from ‘0000’ to ‘1111’. TABLE 27-43: COMPARATOR REFERENCE VOLTAGE SPECIFICATIONS Standard Operating Conditions: 3.0V to 3.6V DC CHARACTERISTICS (unless otherwise stated) Operating temperature -40°C ≤ TA ≤ +85°C for Industrial -40°C ≤ TA ≤ +125°C for Extended Param No. Symbol Characteristic Min. Typ Max. Units Conditions VRD310 CVRES Resolution CVRSRC/24 — CVRSRC/32 LSb VRD311 CVRAA Absolute Accuracy — — 0.5 LSb VRD312 CVRUR Unit Resistor Value (R) — 2k — Ω DS70293B-page 312 Preliminary © 2008 Microchip Technology Inc.
PIC24HJ32GP302/304, <strong>PIC24HJ64</strong>GPX02/X04, AND PIC24HJ128GPX02/X04 FIGURE 27-21: PARALLEL SLAVE PORT TIMING DIAGRAM CS RD WR PS4 PMD PS3 PS1 PS2 TABLE 27-44: AC CHARACTERISTICS Param No. SETTING TIME SPECIFICATIONS Standard Operating Conditions: 3.0V to 3.6V (unless otherwise stated) Operating temperature -40°C ≤ TA ≤ +85°C for Industrial -40°C ≤ TA ≤ +125°C for Extended Symbol Characteristic Min. Typ Max. Units Conditions PS1 TdtV2wrH Data in Valid before WR or CS Inactive (setup time) PS2 TwrH2dtI WR or CS Inactive to Data-In Invalid (hold time) PS3 TrdL2dtV RD and CS to Active Data-Out Valid PS4 TrdH2dtI RD Active or CS Inactive to Data-Out Invalid 20 — — ns 20 — — ns — — 80 ns 10 — 30 ns © 2008 Microchip Technology Inc. Preliminary DS70293B-page 313
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