PIC24HJ64 Datasheet

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PIC24HJ32GP302/304, PIC24HJ64GPX02/X04, AND PIC24HJ128GPX02/X04 Communication Modules: • 4-wire SPI (up to two modules): - Framing supports I/O interface to simple codecs - Supports 8-bit and 16-bit data - Supports all serial clock formats and sampling modes • I 2 C: - Full Multi-Master Slave mode support - 7-bit and 10-bit addressing - Bus collision detection and arbitration - Integrated signal conditioning - Slave address masking • UART (up to two modules): - Interrupt on address bit detect - Interrupt on UART error - Wake-up on Start bit from Sleep mode - 4-character TX and RX FIFO buffers - LIN bus support - IrDA ® encoding and decoding in hardware - High-Speed Baud mode - Hardware Flow Control with CTS and RTS • Enhanced CAN (ECAN module) 2.0B active: - Up to eight transmit and up to 32 receive buffers - 16 receive filters and three masks - Loopback, Listen Only and Listen All - Messages modes for diagnostics and bus monitoring - Wake-up on CAN message - Automatic processing of Remote Transmission Requests - FIFO mode using DMA - DeviceNet addressing support • Parallel Master Slave Port (PMP/EPSP): - Supports 8-bit or 16-bit data - Supports 16 address lines • Programmable Cyclic Redundancy Check (CRC): - Programmable bit length for the CRC generator polynomial (up to 16-bit length) - 8-deep, 16-bit or 16-deep, 8-bit FIFO for data input System Management: • Flexible clock options: - External, crystal, resonator, internal RC - Fully integrated Phase-Locked Loop (PLL) - Extremely low jitter PLL • Power-up Timer • Oscillator Start-up Timer/Stabilizer • Watchdog Timer with its own RC oscillator • Fail-Safe Clock Monitor • Reset by multiple sources Power Management: • On-chip 2.5V voltage regulator • Switch between clock sources in real time • Idle, Sleep, and Doze modes with fast wake-up Analog-to-Digital Converters (ADCs): • 10-bit, 1.1 Msps or 12-bit, 500 Ksps conversion: - Two and four simultaneous samples (10-bit ADC) - Up to 13 input channels with auto-scanning - Conversion start can be manual or synchronized with one of four trigger sources - Conversion possible in Sleep mode - ±2 LSb max integral nonlinearity - ±1 LSb max differential nonlinearity Comparator Module: • Two analog comparators with programmable input/output configuration CMOS Flash Technology: • Low-power, high-speed Flash technology • Fully static design • 3.3V (±10%) operating voltage • Industrial and Extended temperature • Low power consumption Packaging: • 28-pin SDIP/SOIC/QFN-S • 44-pin TQFP/QFN Note: See the device variant tables for exact peripheral features per device. DS70293B-page 2 Preliminary © 2008 Microchip Technology Inc.
PIC24HJ32GP302/304, PIC24HJ64GPX02/X04, AND PIC24HJ128GPX02/X04 PIC24HJ32GP302/304, PIC24HJ64GPX02/X04, AND PIC24HJ128GPX02/X04 PRODUCT FAMILIES The device names, pin counts, memory sizes, and peripheral availability of each device are listed below. The following pages show their pinout diagrams. PIC24HJ32GP302/304, PIC24HJ64GPX02/X04, and PIC24HJ128GPX02/X04 Controller Families Remappable Peripheral Device Pins Program Flash Memory (Kbyte) RAM (Kbyte) (1) Remappable Pins 16-bit Timer (2) Input Capture Output Compare Standard PWM UART SPI ECAN External Interrupts (3) RTCC I 2 C CRC Generator 10-bit/12-bit ADC (Channels) Analog Comparator (2 Channels/Voltage Regulator) 8-bit Parallel Master Port (Address Lines) I/O Pins Packages PIC24HJ128GP504 44 128 8 26 5 4 4 2 2 1 3 1 1 1 13 1/1 11 35 QFN TQFP PIC24HJ128GP502 28 128 8 16 5 4 4 2 2 1 3 1 1 1 10 1/0 2 21 SDIP SOIC QFN-S PIC24HJ128GP204 44 128 8 26 5 4 4 2 2 0 3 1 1 1 13 1/1 11 35 QFN TQFP PIC24HJ128GP202 28 128 8 16 5 4 4 2 2 0 3 1 1 1 10 1/0 2 21 SDIP SOIC QFN-S PIC24HJ64GP504 44 64 8 26 5 4 4 2 2 1 3 1 1 1 13 1/1 11 35 QFN TQFP PIC24HJ64GP502 28 64 8 16 5 4 4 2 2 1 3 1 1 1 10 1/0 2 21 SDIP SOIC QFN-S PIC24HJ64GP204 44 64 8 26 5 4 4 2 2 0 3 1 1 1 13 1/1 11 35 QFN TQFP PIC24HJ64GP202 28 64 8 16 5 4 4 2 2 0 3 1 1 1 10 1/0 2 21 SDIP SOIC QFN-S PIC24HJ32GP304 44 32 4 26 5 4 4 2 2 0 3 1 1 1 13 1/1 11 35 QFN TQFP PIC24HJ32GP302 28 32 4 16 5 4 4 2 2 0 3 1 1 1 10 1/0 2 21 SDIP SOIC QFN-S Note 1: RAM size is inclusive of 2 Kbytes of DMA RAM for all devices except PIC24HJ32GP302/304, which include 1 Kbyte of DMA RAM. 2: Only four out of five timers are remappable. 3: Only two out of three interrupts are remappable. © 2008 Microchip Technology Inc. Preliminary DS70293B-page 3
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