PIC24HJ64 Datasheet

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PIC24HJ32GP302/304, <strong>PIC24HJ64</strong>GPX02/X04, AND PIC24HJ128GPX02/X04 REGISTER 21-1: RCFGCAL: RTCC CALIBRATION AND CONFIGURATION REGISTER (1) (CONTINUED) bit 7-0 CAL: RTC Drift Calibration bits 01111111 =Maximum positive adjustment; adds 508 RTC clock pulses every one minute • • • 01111111 =Minimum positive adjustment; adds 4 RTC clock pulses every one minute 00000000 =No adjustment 11111111 =Minimum negative adjustment; subtracts 4 RTC clock pulses every one minute • • • 10000000 =Maximum negative adjustment; subtracts 512 RTC clock pulses every one minute Note 1: The RCFGCAL register is only affected by a POR. 2: A write to the RTCEN bit is only allowed when RTCWREN = 1. 3: This bit is read-only. It is cleared to ‘0’ on a write to the lower half of the MINSEC register. DS70293B-page 234 Preliminary © 2008 Microchip Technology Inc.
PIC24HJ32GP302/304, <strong>PIC24HJ64</strong>GPX02/X04, AND PIC24HJ128GPX02/X04 REGISTER 21-2: PADCFG1: PAD CONFIGURATION CONTROL REGISTER U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0 — — — — — — — — bit 15 bit 8 U-0 U-0 U-0 U-0 U-0 U-0 R/W-0 R/W-0 — — — — — — RTSECSEL (1) PMPTTL bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 15-2 Unimplemented: Read as ‘0’ bit 1 RTSECSEL: RTCC Seconds Clock Output Select bit (1) 1 = RTCC seconds clock is selected for the RTCC pin 0 = RTCC alarm pulse is selected for the RTCC pin bit 0 PMPTTL: PMP Module TTL Input Buffer Select bit 1 = PMP module uses TTL input buffers 0 = PMP module uses Schmitt Trigger input buffers Note 1: To enable the actual RTCC output, the RTCOE (RCFGCAL) bit needs to be set. © 2008 Microchip Technology Inc. Preliminary DS70293B-page 235
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