PIC24HJ64 Datasheet

PIC24HJ32GP302/304, PIC24HJ64GPX02/X04, AND PIC24HJ128GPX02/X04
SPIxSTAT (SPIx Status and Control) ....................... 168
SR (CPU Status)................................................... 16, 66
T1CON (Timer1 Control)........................................... 154
TCxCON (Input Capture x Control)........................... 162
TxCON (Type B Time Base Control) ........................ 158
TyCON (Type C Time Base Control) ........................ 159
UxMODE (UARTx Mode).......................................... 182
UxSTA (UARTx Status and Control)......................... 184
Reset
Illegal Opcode ....................................................... 53, 60
Trap Conflict.......................................................... 59, 60
Uninitialized W Register........................................ 53, 60
Reset Sequence.................................................................. 61
Resets ................................................................................. 53
S
Serial Peripheral Interface (SPI) ....................................... 167
Software Reset Instruction (SWR) ...................................... 59
Software Simulator (MPLAB SIM)..................................... 272
Software Stack Pointer, Frame Pointer
CALLL Stack Frame.................................................... 41
Special Features of the CPU............................................. 253
SPI Module
SPI1 Register Map...................................................... 29
Symbols Used in Opcode Descriptions............................. 264
System Control
Register Map......................................................... 39, 40
T
Temperature and Voltage Specifications
AC ............................................................................. 285
Timer1 ............................................................................... 153
Timer2/3............................................................................ 155
Timing Characteristics
CLKO and I/O ........................................................... 288
Timing Diagrams
10-bit A/D Conversion (CHPS = 01,
SIMSAM = 0, ASAM = 0,
SSRC = 000)..................................................... 310
12-bit A/D Conversion (ASAM = 0,
SSRC = 000)..................................................... 308
Brown-out Situations...................................................59
ECAN I/O .................................................................. 304
External Clock........................................................... 286
I2Cx Bus Data (Master Mode) .................................. 300
I2Cx Bus Data (Slave Mode) .................................... 302
I2Cx Bus Start/Stop Bits (Master Mode) ................... 300
I2Cx Bus Start/Stop Bits (Slave Mode) ..................... 302
Input Capture (CAPx)................................................ 293
OC/PWM................................................................... 294
Output Compare (OCx)............................................. 293
Reset, Watchdog Timer, Oscillator
Start-up Timer and Power-up Timer ................. 289
SPIx Master Mode (CKE = 0) ................................... 295
SPIx Master Mode (CKE = 1) ................................... 296
SPIx Slave Mode (CKE = 0) ..................................... 297
SPIx Slave Mode (CKE = 1) ..................................... 298
Timer1, 2 and 3 External Clock ................................ 291
Timing Requirements
CLKO and I/O ........................................................... 288
External Clock........................................................... 286
Input Capture............................................................ 293
Timing Specifications
10-bit A/D Conversion Requirements ....................... 311
12-bit A/D Conversion Requirements ....................... 309
CAN I/O Requirements............................................. 304
I2Cx Bus Data Requirements (Master Mode)........... 301
I2Cx Bus Data Requirements (Slave Mode)............. 303
Output Compare Requirements................................ 293
PLL Clock ................................................................. 287
Reset, Watchdog Timer, Oscillator Start-up
Timer, Power-up Timer and Brown-out
Reset Requirements......................................... 290
Simple OC/PWM Mode Requirements ..................... 294
SPIx Master Mode (CKE = 0) Requirements............ 295
SPIx Master Mode (CKE = 1) Requirements............ 296
SPIx Slave Mode (CKE = 0) Requirements.............. 297
SPIx Slave Mode (CKE = 1) Requirements.............. 299
Timer1 External Clock Requirements....................... 291
Timer2 External Clock Requirements....................... 292
Timer3 External Clock Requirements....................... 292
U
UART Module
UART1 Register Map............................................ 28, 29
Universal Asynchronous Receiver
Transmitter (UART) .................................................. 181
Using the RCON Status Bits............................................... 60
V
Voltage Regulator (On-Chip) ............................................ 257
W
Watchdog Time-out Reset (WDTR).................................... 59
Watchdog Timer (WDT)............................................ 253, 258
Programming Considerations ................................... 258
WWW Address ................................................................. 335
WWW, On-Line Support ....................................................... 8
DS70293B-page 332 Preliminary © 2008 Microchip Technology Inc.