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GlossaryThis glossary lists abbreviations used in this document.AEMAACIAHB AMBAAPBAXI CADICLCDCODECCXSMDOCDMCArchitecture Envelope Model. A highly-configurable simulation model of a processor compliant tothe <strong>ARM</strong>v7-A architecture supporting multiprocessor, large physical address and virtualizationextensions.Advanced Audio CODEC Interface.Advanced High-performance Bus. The <strong>ARM</strong> open standard for on-chip buses.Advanced Microcontroller Bus Architecture.Advanced Peripheral Bus. The <strong>ARM</strong> open standard for peripheral buses. This design is optimizedfor low power and minimal interface complexity.Advanced eXtensible Interface. The <strong>ARM</strong> open standard for high-performance and high-frequencybuses.Cycle Accurate Debug Interface. A C++ API supporting interface capabilities for re-targetable,multi-core debug integration.Color Liquid-Crystal Display.COder DECoder for converting between analog and digital audio signals.Cycle approXimate System Model.Disk-On-Chip. A non-volatile flash memory device with an interface that simplifies file accesses.Also called NAND flash referring to the logic gates used internally. The memory can only beaccessed sequentially in blocks.Dynamic Memory Controller.<strong>ARM</strong> DUI 0575A Copyright © 2011 <strong>ARM</strong>. All rights reserved. Glossary-1ID051811Non-Confidential

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