MPhil thesis of Lo Chi Wa - Department of Electronic & Computer ...

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output of the voltage-controlled oscillator is probed by a high-impedance probe or a DCprobe and amplified by a low-noise amplifier. Both the high-impedance probe and theDC probe which have the similar attenuation of 26dB at 900MHz can be used becausethere are output buffers, as shown in Fig. 126, between the voltage-controlled oscillatorand the pads. However, the driving power of the on-chip output buffers is too small andthe attenuated signal is too small to be measured by the spectrum analyzer. Therefore,the low-noise amplifier is needed to amplify the signals. The spectrum analyzer is usedto measure the phase noise and spur performance of the signal.fin25.6MhzHP 80000Datagenerator /HP 8110APulsegeneratorHi-Z probe/DC probeHP 4648Csignal generatorPhaseDetector4lsb10bLPF32,32.5 .. 39.5Sigma-DeltaModulator6lsb4b4bChannel selection7lsbVCO8b(Freq offset)-R8b6b(gain 1/16~
Fig. 126 Schematic diagram of the pad buffer for the VCO outputsThe whole synthesizer is fabricated on a single chip. The chip (a) is glued on a printedcircuit board (PCB), as shown in Fig. 127. All the DC biases, low-speed inputs andoutputs are connected by bond wires from the die to the PCB. The DC biases (b) areconnected to a battery DC supply through flat cables. The frequency reference sourcefrom a signal generator is connected through SMA cable to SMA connector (c) on thePCB. The channel selection word (d) and the shift register’s inputs and outputs (e) areconnected through flat cables the computer. The digital modulation inputs (f) arecontrolled through the SMA cables from the data generator.119
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A 1.5-V 900-Mhz Monolithic CMOSFast
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A 1.5-V 900-Mhz Monolithic CMOS Fas
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Table of ContentsPageAcknowledgment
Page 7 and 8:
Testing setup......................
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List of FiguresPageFig. 1 Block dia
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Fig. 76 Amplitudes and currents of
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Chapter 1 IntroductionBackgroundWir
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applications because it can provide
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existing monolithic frequency synth
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the receiver frequency band is from
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out-of-bandin-bandout-of-band0dBmin
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Based on the maximum interference,
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carrierdBcspur∆fFig. 8 Frequency
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Spurs requirement (dBc)Frequency of
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The frequency diversity can be perf
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Chapter 3 System DesignPhase-locked
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coarse tuning can be provided by th
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array is now possible. Moreover, th
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performance of the synthesizer 9 .
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signalquantizationnoisea) f b)signa
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esolution. The loop bandwidth is 80
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the output value between 0 and 0.5,
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The coupled-LC oscillators can be v
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890MHzf25MHz243KHz865MHzFig. 23 Tun
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onoffCwellClinearCwellClinearCwellC
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spirals of similar sizes is around
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in Fig. 27a and Fig. 27b, the same
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conductance (Gm) and the reciprocal
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−19⎛ 900M⎞0.0259×1.6×10 ×
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GdoVinFig. 32 Gdo of the proposed L
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RzCzIcpCpR4C4a)IcpCzR4B.IcpCpRpC4b)
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Usually, capacitors in the filter o
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RVinFig. 38 Resistance of NMOS resi
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feedback path to prevent the proble
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890MHz25MHz865MHzfA+∆A
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High-speed multi-modulus dividerThe
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CLKQBQDDBFig. 50 Schematic diagram
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ANDgateABclkclkclkclkQBFig. 54 Sche
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f o/2 /2,3 /2,3 /2 /2f div/4Combina
Page 79 and 80: next stage, as shown in the Fig. 59
Page 81 and 82: co10bDclkclkFig. 60 Schematic of th
Page 83 and 84: (1-Z -1 ) 23bDQBclkZ -1 (1-Z -1 )2b
Page 85 and 86: X 16clkDclkQBDclkQBFig. 66 Schemati
Page 87 and 88: ~90 oa) b) c)Fig. 68 Different meth
Page 89 and 90: (dotted line). As the oscillation c
Page 91 and 92: In practice, it is not desirable to
Page 93 and 94: and decrease in amplitude mismatch
Page 95 and 96: Current interactionThe two oscillat
Page 97 and 98: equirements. Fortunately, by connec
Page 99 and 100: LC oscillators are put apart to red
Page 101 and 102: Gain mismatch (in %)Two oscillators
Page 103 and 104: equals to1 . By doubling the height
Page 105 and 106: 30 is obtained. It is because the s
Page 107 and 108: The spiral inductor is designed and
Page 109 and 110: oscillators (shown in the upper and
Page 111 and 112: Synthesizer LayoutThe layout and th
Page 113 and 114: Die LayoutFig. 98 shows the die pho
Page 115 and 116: Testing setupThe testing setup show
Page 117 and 118: Resistance (ohms)Freq (Hz)Fig. 101
Page 119 and 120: Resistance (ohms)Freq (Hz)Fig. 105
Page 121 and 122: VaractorFig. 109 shows the testing
Page 123 and 124: Table 5 Summary of parameters of va
Page 125 and 126: Table 6 Summary of N-well substrate
Page 127 and 128: Fig. 120 Quality factor of the swit
Page 129: The decrease in quality factor is d
Page 133 and 134: Output frequency(MHz)Number of swit
Page 135 and 136: Gain (MHz/V)Tuning voltage (v)Fig.
Page 137 and 138: on the process variation. Therefore
Page 139 and 140: voltage (Vos = Rp x Ios) appeared.
Page 141 and 142: Although the spurs are quite large,
Page 143 and 144: GMSK signals with 0.3 BT and a bit
Page 145 and 146: Power spectral density (dB)(b)(a)(c
Page 147 and 148: Summary of performanceA summary of
Page 149 and 150: Table 10 Comparison of performances
Page 151 and 152: As the voltage-controlled oscillato
Page 153 and 154: Bibliography1 Thomas H. Lee, The De
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MPhil thesis of Lo Chi Wa - Department of Electronic & Computer ...

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