MPhil thesis of Lo Chi Wa - Department of Electronic & Computer ...

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eceiver system. Due to the problem of testing setup, the GMSK modulation cannot betested. Only the FSK modulation can be tested but it can still demonstrate the ability ofdigital modulation of the frequency synthesizer.140
Bibliography1 Thomas H. Lee, The Design of CMOS Radio-Frequency Integrated Circuits, Cambridge University Press, 1998, pp.5162 Jan Craninckx, and Michel S. J. Steyaert, "A Fully Integrated CMOS DCS-1800 Frequency Synthesizer", IEEE J.Solid-State Circuits, vol.33 no.12, pp.2054-2065, Dec. 1998.3 ETSI, “Digital cellular telecommunications system (Phase 2+); Radio transmission and reception (GSM 5.05)”,European Telecommunications Standards Institute, Copyright 1996.4 A. Ali, J. L. Tham, “A 900-MHz frequency synthesizer with integrated LC voltage-controlled oscillator”,Proceedings of the IEEE International Solid-State Circuits Conference 1996, pp.390-1, 19965 “Specification of Bluetooth system version 1.0B”, Teletouaktiebolaget LM Ericsson, IBM Corporation, IntelCorporation, Nokia Corporation, Toshiba Corporation, Copyright 1999.6 Michael H. Perrot, Theodore L. Tewksbury III, and Charles G. Sodini, “A 27-mW CMOS fractional-N synthesizerusing digital compensation for 2.5-Mb/s GFSK modulation”, IEEE J. Solid-State Circuits, vol.32 no.12, pp2048-2060, Dec. 19977 B-G Goldberg, Digital Techniques in Frequency Synthesis, McGraw-Hill, 1996, pp. 183-48 A. Yamagishi, M. Ishikawa, T. Tsukahara, and S. Date, “A 2-V, 2-GHz low-power direct digital frequencysynthesizer chip-set for wireless communication,” IEEE J. Solid-State Ciruits, vol. 33, pp. 210-217, 1998.9 B. Razavi, "Challenges in the Design of Frequency Synthesizers for Wireless Applications," (Invited) Proc. IEEECustom Integrated Circuits Conference, pp. 395-402, May 1997.10 J. Candy and G. Temes, Oversampling Delta-Sigma Data Converters, New York: IEEE Press, 1992.11 Ahmadreza Rofougaran, Jacob Rael, Maryam Rofougaran, Asad Abidi, "A 900 MHz CMOS LC-Oscillator WithQuadrature Outputs", Digest of Technical Papers, 1996 IEEE International Solid-State Circuit Conf., pp. 392-3,1996.12 Chi-wa Lo, Howard C. Luong, "2-V 900-Mhz Quadrature Coupled LC Oscillators With Improved Amplitude AndPhase Matchings", Proceedings of the 1999 IEEE International Symposium on Circuits and Systems, vol.2, pp.585-8, June 1999.13 Kral, F Behbahani, Asad Abidi, "RF-CMOS Oscillators with Switched Tuning", Proceedings of the IEEE 1998Custom IC Conf., pp.555-8, 1998.14 A. M. Niknejad, R. G. Meyer, “Analysis, design, and optimization of spiral inductors and transformers for Si RFIC’s,” IEEE Journal of Solid-State Circuits, vol. 33, no. 10, Oct. 1998.15 Ali Hajimiri and Thomas H. Lee, “A general theory of phase noise in electrical oscillators”, IEEE Journal of Solid-State Circuits, Vol. 33, No. 2, Feb. 1998, pp. 179-194.16 H. Yoshizawa, K. Taniguchi, K. Nakashi, "An implementation technique of dynamic CMOS circuit applicable toasynchronous/synchronous logic", Proceedings of the 1998 IEEE International Symposium on Circuits andSystems, vol.2, pp.145-8, June 199817 P. Gray, R. Meyer, "Future Directions in Silicon ICs for RF Personal Communications," Proceedings of the IEEE1995 Custom integrated Circuits Conference, pp 83-90, May 199518 H. Takahashi, et al, "A Direct Conversion Receiver Utilizing a Novel FSK Demodulator and a Low-PowerConsumption Quadrature Quadrature Mixer," 42 nd IEE Vehicular Technology Conference, pp.910-915, May 199219 B. Razavi, RF Microelectronics, Prentice Hall PTR, 1998.20 B. Razavi, et al,"A 1.8Ghz CMOS voltage-controlled oscillator," ISSCC Digest of technical papers, pp. 388-399,Feb. 1997.141
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A 1.5-V 900-Mhz Monolithic CMOSFast
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A 1.5-V 900-Mhz Monolithic CMOS Fas
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Table of ContentsPageAcknowledgment
Page 7 and 8:
Testing setup......................
Page 9 and 10:
List of FiguresPageFig. 1 Block dia
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Fig. 76 Amplitudes and currents of
Page 13 and 14:
Chapter 1 IntroductionBackgroundWir
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applications because it can provide
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existing monolithic frequency synth
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the receiver frequency band is from
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out-of-bandin-bandout-of-band0dBmin
Page 23 and 24:
Based on the maximum interference,
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carrierdBcspur∆fFig. 8 Frequency
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Spurs requirement (dBc)Frequency of
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The frequency diversity can be perf
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Chapter 3 System DesignPhase-locked
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coarse tuning can be provided by th
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array is now possible. Moreover, th
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performance of the synthesizer 9 .
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signalquantizationnoisea) f b)signa
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esolution. The loop bandwidth is 80
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the output value between 0 and 0.5,
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The coupled-LC oscillators can be v
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890MHzf25MHz243KHz865MHzFig. 23 Tun
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onoffCwellClinearCwellClinearCwellC
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spirals of similar sizes is around
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in Fig. 27a and Fig. 27b, the same
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conductance (Gm) and the reciprocal
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−19⎛ 900M⎞0.0259×1.6×10 ×
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GdoVinFig. 32 Gdo of the proposed L
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RzCzIcpCpR4C4a)IcpCzR4B.IcpCpRpC4b)
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Usually, capacitors in the filter o
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RVinFig. 38 Resistance of NMOS resi
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feedback path to prevent the proble
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890MHz25MHz865MHzfA+∆A
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High-speed multi-modulus dividerThe
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CLKQBQDDBFig. 50 Schematic diagram
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ANDgateABclkclkclkclkQBFig. 54 Sche
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f o/2 /2,3 /2,3 /2 /2f div/4Combina
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next stage, as shown in the Fig. 59
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co10bDclkclkFig. 60 Schematic of th
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(1-Z -1 ) 23bDQBclkZ -1 (1-Z -1 )2b
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X 16clkDclkQBDclkQBFig. 66 Schemati
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~90 oa) b) c)Fig. 68 Different meth
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(dotted line). As the oscillation c
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In practice, it is not desirable to
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and decrease in amplitude mismatch
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Current interactionThe two oscillat
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equirements. Fortunately, by connec
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LC oscillators are put apart to red
Page 101 and 102: Gain mismatch (in %)Two oscillators
Page 103 and 104: equals to1 . By doubling the height
Page 105 and 106: 30 is obtained. It is because the s
Page 107 and 108: The spiral inductor is designed and
Page 109 and 110: oscillators (shown in the upper and
Page 111 and 112: Synthesizer LayoutThe layout and th
Page 113 and 114: Die LayoutFig. 98 shows the die pho
Page 115 and 116: Testing setupThe testing setup show
Page 117 and 118: Resistance (ohms)Freq (Hz)Fig. 101
Page 119 and 120: Resistance (ohms)Freq (Hz)Fig. 105
Page 121 and 122: VaractorFig. 109 shows the testing
Page 123 and 124: Table 5 Summary of parameters of va
Page 125 and 126: Table 6 Summary of N-well substrate
Page 127 and 128: Fig. 120 Quality factor of the swit
Page 129 and 130: The decrease in quality factor is d
Page 131 and 132: Fig. 126 Schematic diagram of the p
Page 133 and 134: Output frequency(MHz)Number of swit
Page 135 and 136: Gain (MHz/V)Tuning voltage (v)Fig.
Page 137 and 138: on the process variation. Therefore
Page 139 and 140: voltage (Vos = Rp x Ios) appeared.
Page 141 and 142: Although the spurs are quite large,
Page 143 and 144: GMSK signals with 0.3 BT and a bit
Page 145 and 146: Power spectral density (dB)(b)(a)(c
Page 147 and 148: Summary of performanceA summary of
Page 149 and 150: Table 10 Comparison of performances
Page 151: As the voltage-controlled oscillato
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