Avalon Interface Specifications (PDF) - Altera

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7–4 Chapter 7: Avalon Tristate Conduit Interface Tristate Conduit Timing Figure 7–3. Arbitration Timing clk request grant 3. In cycle 8, the tristate conduit master asserts grant. The granted slave drives valid data in cycles 8–16. 4. Cycle 3 is the only cycle that does not contain valid data. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 data_out[31:0] 0 . a b c d e f 10 11 12 13 14 15 16 17 Avalon Interface Specifications May 2013 Altera Corporation
Document Revision History How to Contact Altera Additional Information This chapter provides additional information about the document and Altera. The following table shows the revision history for this document. Date Version Changes May 2013 13.0 Minor updates to Chapter 3, Avalon Memory-Mapped Interfaces: Minor updates to Chapter 5, Avalon Streaming Interfaces: Updated Chapter 6, Avalon Conduit Interfaces to describe the signal roles supported by Avalon conduit interfaces. Updated Figure 7–1 on page 7–1. May 2011 11.0 Initial release of the Avalon Interface Specifications supported by Qsys. To locate the most up-to-date information about Altera products, refer to the following table. Contact (1) Contact Method Address Technical support Website www.altera.com/support Technical training Website Email www.altera.com/training custrain@altera.com Product literature Website www.altera.com/literature Non-technical support (General) Email nacomp@altera.com (Software Licensing) Email authorization@altera.com Note to Table: (1) You can also contact your local Altera sales office or sales representative. May 2013 Altera Corporation Avalon Interface Specifications
Page 1 and 2: Avalon Interface Specifications 101
Page 3 and 4: Contents Chapter 1. Introduction 1.
Page 5 and 6: 1. Introduction Avalon ® interface
Page 7 and 8: Chapter 1: Introduction 1-3 In Figu
Page 9 and 10: Chapter 1: Introduction 1-5 Related
Page 11 and 12: 2.1. Clock Sink 2. Avalon Clock and
Page 13 and 14: Chapter 2: Avalon Clock and Reset I
Page 15 and 16: 3.1. Introduction 3. Avalon Memory-
Page 17 and 18: Chapter 3: Avalon Memory-Mapped Int
Page 31 and 32: 4.1. Interrupt Sender 4. Avalon Int
Page 33 and 34: Chapter 4: Avalon Interrupt Interfa
Page 35 and 36: 5. Avalon Streaming Interfaces You
Page 37 and 38: Chapter 5: Avalon Streaming Interfa
Page 45 and 46: 6. Avalon Conduit Interfaces Avalon
Page 47 and 48: Figure 7-1. Shared Pin Types Bidire
Page 49: Chapter 7: Avalon Tristate Conduit

Avalon Interface Specifications (PDF) - Altera

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