Functional Description -- HPC II Controller, External Memory ... - Altera
Functional Description -- HPC II Controller, External Memory ... - Altera
Functional Description -- HPC II Controller, External Memory ... - Altera
You also want an ePaper? Increase the reach of your titles
YUMPU automatically turns print PDFs into web optimized ePapers that Google loves.
5-28<br />
<strong>Controller</strong> Register Map<br />
emi_rm_004<br />
2013.12.16<br />
Signal Name<br />
Direction<br />
<strong>Description</strong><br />
Note to Table:<br />
1. Applies only to the hard memory controller with multiport front end available in Arria V and Cyclone V<br />
devices.<br />
<strong>Controller</strong> Register Map<br />
The controller register map allows you to control the memory controller settings.<br />
Note:<br />
Dynamic reconfiguration is not currently supported.<br />
The following table lists the register map for the controller.<br />
Table 5-16: <strong>Controller</strong> Register Map<br />
Address<br />
Bit<br />
Name<br />
Default<br />
Access<br />
<strong>Description</strong><br />
0<br />
Reserved.<br />
0<br />
—<br />
Reserved for future use.<br />
1<br />
Reserved.<br />
0<br />
—<br />
Reserved for future use.<br />
0x100<br />
2<br />
7:3<br />
Reserved.<br />
Reserved.<br />
0<br />
0<br />
—<br />
—<br />
Reserved for future use.<br />
Reserved for future use.<br />
13:8<br />
Reserved.<br />
0<br />
—<br />
Reserved for future use.<br />
30:14<br />
Reserved.<br />
0<br />
—<br />
Reserved for future use.<br />
<strong>Altera</strong> Corporation<br />
<strong>Functional</strong> <strong>Description</strong>—<strong>HPC</strong> <strong>II</strong> <strong>Controller</strong><br />
Send Feedback
Change language