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13th International Conference on Membrane Computing - MTA Sztaki

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Maintenance of chr<strong>on</strong>obiological informati<strong>on</strong> by P system mediated assembly<br />

of c<strong>on</strong>trol units for oscillatory waveforms and frequency<br />

0:ModuleC<strong>on</strong>nect(separator[1] → mod17[1], {(O3 F ,C)}),<br />

200 : ModuleDisc<strong>on</strong>nect(brusselator[1] ↔ separator[1]),<br />

200 : ModuleC<strong>on</strong>nect(brusselator[1] → mod17[1], {(S, C)})}<br />

repressilator[1]<br />

goodwin[1]<br />

B T 1<br />

T<br />

B 2<br />

T<br />

B 3<br />

T<br />

B 4<br />

T<br />

B 5<br />

0 0 0 1 1<br />

0 0 1 1 1<br />

0 1 1 1 1<br />

0 1 0 1 1<br />

1 1 0 0 0<br />

separator[1] brusselator[1] mod17[1]<br />

B 1<br />

T<br />

c<strong>on</strong>centrati<strong>on</strong> (a.u.)<br />

4<br />

3.5<br />

3<br />

2.5<br />

2<br />

1.5<br />

1<br />

0.5<br />

0<br />

C<br />

0 200 400 600 800 1000 1200<br />

time (a.u.)<br />

C<br />

Fig. 7. Dynamical behaviour of the frequency divider 1:5 obtained by skipping the<br />

binary signal separator (left: cycle of state transiti<strong>on</strong>s, right: counts together with<br />

divider output)<br />

reveals a frequency divider 1:5 although no changes within the logical unit were<br />

made. The same effect can be observed if the Brusselator is directly c<strong>on</strong>nected<br />

with the logical unit from the beginning while avoiding any temporary c<strong>on</strong>necti<strong>on</strong><br />

with the binary separator module. Figure 7 shows the behavioural pattern. It<br />

appears that a majority of state transiti<strong>on</strong>s skip by leaving a reduced scheme<br />

with identical signal courses of b 4 and b 5 persistently cycling through five states<br />

(after a short transient phase). A most likely reas<strong>on</strong> for that can be found in<br />

the waveform in c<strong>on</strong>cert with the quantitatively high-valued oscillatory signal<br />

released by the Brusselator. Most of the time, its course indicates the logical<br />

value “1” solely interrupted by extremely short drops at the 0-level. Since the<br />

flip flops had been designed to be set or reset at the 1-level, the circuit loses<br />

its synchr<strong>on</strong>icity due to the variable cascade lengths in computing the boolean<br />

functi<strong>on</strong>s. This in turn might entail a scenario where intermediate stages in the<br />

computati<strong>on</strong> of a bit b ′ i interfere with the computati<strong>on</strong> of another bit b′ j .<br />

3.4 Frequency Divider 1:6 by Repressilator Instead of Brusselator<br />

Due to its nature to induce almost sinusoidal and hence more symmetric signal<br />

courses, the questi<strong>on</strong> arises whether or not the Repressilator module in its functi<strong>on</strong><br />

as core oscillator could be able to restore the original qualitative behaviour<br />

of the entire system <strong>on</strong> its own when renouncing the binary signal separator<br />

again. Checking out this scenario by the P meta framework<br />

Π FD6 =(M,P)<br />

with<br />

235

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