13th International Conference on Membrane Computing - MTA Sztaki

Fast hardware implementations of P systems
The Algorithms In order to simplify explanation, the design is detailed following
functional division (Fig. 1) commented on previous introduction.
Fig. 1. Overview of architecture. This illustration shows the main blocks and flow of
information between blocks.
Initial Stage
The first block is called calcNx. It receives as input the number of objects of
current configuration from ObjReg, which is detailed below. Its functionality is
to compute the maximum number that rules can be applied, N rx . It is, in consequence,
an arithmetical component. It is necessary to remark that these outputs
depend on evolving mode. For example, considering a chain of rules evolving in
smax mode, only three values are interesting for the execution (Section 4.1):
N rx = 0 and N rx > 1, which indicates rule execution is independent of others;
and N rx = 1 that indicates that its execution is dependent on others (i.e., system
has to choose which rule will be applied).
Assignment Stage
This stage is the most complex and important in the design, and it is implemented
by the block called assignRule. Its task is to select which rules (and how
many times) will be applied. Number of functionalities which are carried out by
it and, in consequence, its implementation, depends on evolving mode selected.
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