researResearch - Télécom Bretagne
researResearch - Télécom Bretagne
researResearch - Télécom Bretagne
Create successful ePaper yourself
Turn your PDF publications into a flip-book with our unique Google optimized e-Paper software.
esearc<br />
<strong>researResearch</strong><br />
IAHP<br />
Computing and High Performance Architectures<br />
Aims and objectives throughout the project<br />
Project Leader :<br />
Ronan Keryell<br />
Department:<br />
• Computer science<br />
Project team:<br />
Ronan Keryell,<br />
Loïc Plassard.<br />
Computer technology is at the heart of a growing number of applications and<br />
users are keen to have ever more efficient tools at their disposal, whether it<br />
be in terms of calculating power, energy consumption or miniaturisation.The<br />
aim of this project is to develop new methods to improve performance to be<br />
applied to different domains such as : embedded computing, integrated<br />
circuits, scientific calculation and networks. This project places great<br />
emphasis on ensuring that improvement in performance is not achieved at<br />
the expense of security.<br />
Within the framework of the Franco-German CoMap project involving the<br />
UBO/LESTER/AS, ENSSAT/R2D2, Erlangen University, and Dresden University<br />
teams, we are studying software transformations which enable simpler<br />
programming of embedded systems of the MP-SoC type. For this, we use<br />
high-level source programs to exploit different parallelism levels (processors,<br />
units of calculation, SIMD mode.etc..)<br />
For more distributed applications, we are studying, in collaboration with<br />
Telecom SudPAris :<br />
• new semi-automatic parallelisation methods enabling programming of<br />
architectures without shared memory, with an « OpenMP - like »<br />
formalism, using a check-pointing technique;<br />
• the setting up and organisation, in the form of a concretely exploitable<br />
calculation grid, of mobile phones to be used as processors.<br />
Finally, we are aiming to combine high level performance and security with the<br />
CryptoPage project within SAFESCALE, a collaborative effort involving the<br />
Paris XIII, IMAG and IRISA teams. Here, the aim is, firstly, the design of a new<br />
processor architecture with a trust mode which encrypts and verifies memory<br />
and, secondly, setting up secure calculation services within a trust grid.<br />
These distributed applications are complex to implement and administer. In<br />
order to facilitate the process, we are developing, as part of the CAMA team’s<br />
SAUNA project, a methodology and PCfEngine tool based on autonomous<br />
systems.<br />
90