researResearch - Télécom Bretagne

h Research
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RESEARCH
Main achievements of the project
Compilation for embedded parallel
architectures
The domain of telecommunications and, more
generally, of computer applications, require more
and more calculating power within the smallest
possible space. The problem of electricity
consumption has become a major constraint in
battery-powered embedded systems, but also
within the framework of sustainable development.
The evolution of electronic integration
technologies means that we can no longer count
on the classic Moore's Law principle to "easily"
obtain speed gains simply by increasing the clock
speed, since we are currently witnessing an
explosion in energy consumption and thus
exceeding thermal constraints. Nevertheless,
since there are more and more transistors
available, the gains can still be obtained by
exploiting massive parallelism, as we see with the
current multi-core and MP-SoC (Multi-Processor
System on Chip) revolutions.
Unfortunately, this makes matters more difficult
for programmers who are going to have to
"parallel" programme in order to exploit the
calculation power of all these, more or less
independent, calculation resources, which is a
much more complex task than classical
sequential programming.
Our team has taken an interest in architecture
programming techniques, such as standard
multi-core processors, graphic processors (GPU),
MP-SoCs (Cell in particular), SIMD instruction
sets, dynamically reconfigurable logical systems
(FPGA). This includes parallel programming
models, parallel languages, optimisations, and
compilers, to which is added an intimate
knowledge of how all these architectures function.
This subject is covered by the ANR FREIA project
(with Thalès Research & Technologies (TRT),
Mines ParisTech CMM & CRI) and the Images &
Networks Competitiveness Cluster project,
TransMedi@, (Alcatel-Lucent, Envivio, Supelec,
and ENSSAT).
The team has been focusing considerably on the
source to source compilation freeware, PIPS,
originally developed at the Mines Paris Tech/CRI
and used and co-developed in several places
(Mines ParisTech, IT SudParis, HPC Project, and
Telecom Bretagne.).
This has re-kindled the historical links between
our team and that of Mines ParisTech, which has
led to the setting up of numerous current projects.
The FREIA project, which started in 2008, deals
with the design of a programming environment for
2 image processing machines, a SPoC
programmable pipeline machine at Mines
ParisTech/CMM and Ter@pix, a bi-dimensional
SIMD machine at TRT. Despite a slow start to the
project, (classic late notification, the search for
and lobbying of a competent doctoral student),
this project is progressing well and a PhD student
(formerly a research engineer at INRIA) has been
recruited. The definitions of the programming
interfaces have been done and a first version of
the SIMD generic code generation phases using C
language in PIPS has been completed. For the
remainder of the project, we will need to target
the SpoC and Ter@pix machines specifically.
The TransMedi@ project also began in 2008 and
its aim is to design network core or border
multimedia routers with H264-type protocols
transcoding possibilities, which allow, for
example, watching, on a cell phone a flow from a
high-definition TV source, or doing on-the-spot
content manipulation, inserting targeted
advertising, and/or video conferencing between
terminals which are very different in terms of data
rate and functionalities, etc. The team has begun
an assessment of the currently useable parallel
architectures which could be embedded in the
routers according to the application needs
specified by the other teams. Thereafter, the
existing codecs will need to be parallelized and
adapted to the target architectures. A senior
researcher at Mines ParisTech is currently in the
process of being recruited, which will enable us to
progress significantly on the project.
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