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researResearch
The work in this field is the same as that which
led to the creation of the start-up, HPC Project,
which currently employs 15 people and has
Ronan Keryell as its Scientific Director.
Architectures for Secure Execution
In addition to the performance needs, we are
witnessing an increase in the demand for greater
security and safety. Unfortunately, the choices
made in the material architectures have up to
now favoured brute performance at the expense
of security. If we wish to have very secure
applications, smart cards can be used, but their
performance levels are modest compared to
classical processors which themselves are not
particularly secure.
Over the last decade, the team has taken an
interest in the design of new processors which
could include an additional secure operational
mode capable of executing procedures
independently of the operating system itself, and
capable of resisting external physical attacks(to
memory, bus, etc.). This is done by adding
internal partitioning mechanisms and an
efficient encryption and certification system
between the cache of the processor and the
external bus.
This CryptoPage processor culminated with
Guillaume Duc's thesis defence (Financed by the
DGA). In his landmark work, he defined the
processor architecture, completed hundreds of
thousands of simulation hours, the portage for
Linux and the compilation chain for such an
architecture.
This year has seen the end of the
BGPR/SAFESCALE (2005-2008) project which
involved INRIA Grenoble/LIG, Paris 13/LIPN, and
IRISA and which aimed at designing a grid type
execution architecture with a certified execution.
The principle was to divide up the calculations
into tasks, using KAAPI formalism and to replay
certain tasks in a safe environment in order to
compare the results and to detect any possible
attacks or errors in a probabilistic manner. The
team improved CryptoPage by adding a taskauthentication
mode in order to be able to certify
that a program compiled by a third party and run
on another CryptoPage was indeed correct.
Finally, given that programming in KAAPI is
complex and quite far-removed from classical
sequential programming, and given the
competence of the team as regards parallelism
and compilation, the other task this year has
been to develop a compilation phase which would
enable the generation of KAAPI/SAFESCALE
code automatically, from any sequential source
code. As of today, we have not yet achieved this
goal.
Work in this field is benefiting considerably from
the collaboration within the TCP project with
Telecom ParisTech, Telecom Sophia Antipolis and
the start-up, Secure IC.
Publications
Articles in peer-review journals
[1] Guillaume Duc, Ronan Keryell. Improving virus protection with
an efficient secure architecture with memory encryption, integrity
and information leakage protection. Journal in computer virology,
may 2008, vol. 4, n° 2, pp. 101-113
[2] Guillaume Duc, Ronan Keryell. CryptoPage : une architecture
efficace combinant chiffrement, integrite memoire et protection
contre les fuites d'informations. Technique et science
informatiques, août 2008, vol. 27, n° 6, pp. 779-814
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