Apalis Carrier Board Design Guide - Toradex
Apalis Carrier Board Design Guide - Toradex
Apalis Carrier Board Design Guide - Toradex
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<strong>Apalis</strong> <strong>Carrier</strong> <strong>Board</strong> <strong>Design</strong> <strong>Guide</strong>Issued by: <strong>Toradex</strong> Document Type: <strong>Carrier</strong> <strong>Board</strong> <strong>Design</strong> <strong>Guide</strong>Purpose:This document is a guideline for developing a carrier board that conforms to the specificationsfor the <strong>Apalis</strong> ® Computer ModuleDocumentVersion:1.3Revision HistoryDateVersionRemarks8 April 2013 V1.0 Initial Release: Preliminary Version27 August 2013 V1.1 Correction in section 4.326 November 2013 V1.2 Correction in Figure 23Correction in Table 10, Table 11, Table 12, and Table 13: signalsUSBH_OC# and USBH_EN pin numbersCorrection in Table 16: Description of the pins 282-30213 April 2015 V1.3 Remove layout guide section (available in a separate document), adddescriptions of low-speed interfaces, minor correctionsCorrection of mSATA schematics (Figure 15)<strong>Toradex</strong> AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com l info@toradex.com Page | 2
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