Apalis Carrier Board Design Guide - Toradex

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Apalis Carrier Board Design GuideApalisPinApalisSignal NameI/OTypePowerRailDescription80 USBH2_D+ I/O USB 3.3V Positive differential USB host signal82 USBH2_D- I/O USB 3.3V Negative differential USB host signal84 USBH_EN O CMOS 3.3VEnable signal for the bus voltage output, shared with all USB hostports96 USBH_OC# I OD 3.3V Over current input signal, shared with all USB host portsTable 10: USBH2 signalsApalisPinApalisSignal NameI/OTypePowerRailDescription86 USBH3_D+ I/O USB 3.3V Positive differential USB host signal88 USBH3_D- I/O USB 3.3V Negative differential USB host signal84 USBH_EN O CMOS 3.3VEnable signal for the bus voltage output, shared with all USB hostports96 USBH_OC# I OD 3.3V Overcurrent input signal, shared with all USB host portsTable 11: USBH3 signalsApalisPinApalisSignal NameI/OTypePowerRailDescription98 USBH4_D+ I/O USB 3.3V Positive differential USB host signal100 USBH4_D- I/O USB 3.3V Negative differential USB host signal94 USB H4_SSRX+ I USB Positive differential receiving host signal for USB3.092 USB H4_SSRX- I USB Negative differential receiving host signal for USB3.0106 USBH4_SSTX+ O USB Positive differential transmission host signal for USB3.0104 USB H4_SSTX- O USB Negative differential transmission host signal for USB3.084 USBH_EN O CMOS 3.3VEnable signal for the bus voltage output, shared with all USB hostports96 USBH_OC# I OD 3.3V Overcurrent input signal, shared with all USB host ports2.5.2 Reference SchematicsTable 12: USBH4 signalsAs the additional SuperSpeed USB 3.0 data signals are PCIe Gen2 signals at the physical layer, theschematic requirements are similar to those for PCIe. This means AC coupling capacitors arerequired. The placement of the capacitors depends on whether the USB 3.0 device is populated onthe carrier board (device-down) or is connected over a cable. The USB 2.0 data signals do notneed any coupling capacitors.The SuperSpeed interface consists of a pair of transmitting (TX) and receiving (RX) traces.Unfortunately, the names RX and TX can be confusing as the host transmitter needs to beconnected to the receiver of the device and vice versa. Normally, the signals are named after thehost until they reach the pins of the USB device. Therefore, the transmitting pins on the Apalismodule should be called TX on the carrier board while the receiving pins should be called RX.Please read carefully the datasheet of the USB device (device-down) in order to ensure RX and TXare not confused.2.5.2.1 USB 3.0 OTG Schematic ExampleThe AC coupling capacitors for the SuperSpeed TX signals are located on the Apalis module whilethe capacitors for the RX signals are located on the USB device. No additional series capacitors arerequired nor permitted on the Carrier board. The USB 2.0 data signals do not need any seriescapacitors at all.Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com l info@toradex.com Page | 26
Apalis Carrier Board Design GuideIf the USB signals are externally available, ESD protection diodes need to be placed on all of theUSB signals. Make sure that the protection diodes are USB 3.0 compliant. The USB 2.0 signalsadditionally require a common mode choke for passing EMI testing. Use common mode chokesthat are specified for High-speed USB 2.0.RX/TXUSB 2.0/1.1USBO1_D+USBO1_D+USBO1_D-USBO1_D-TVSDiodeD+D-RX/TXUSB 2.0/1.1USB 3.0 OTG ControllerTXSuperSpeedRXModuleConnectorTVSDiodeTVSDiodeUSBO1_SSTX+USBO1_SSTX-2x 100nFUSBO1_SSRX+USBO1_SSRX-USBO1_SSTX+USBO1_SSTX-USBO1_SSRX+USBO1_SSRX-SSTX+SSTX-SSRX+SSRX-USB 3.0 OTG ConnectorUSB 3.0 ConnectorRXSuperSpeedTXUSB 3.0 Device2x 100nFApalis ModuleCarrier BoardUSB CableFigure 20: USB 3.0 OTG Block DiagramUSB DriveThe USBO1_ID signal is used to detect which type of USB connector is plugged into the OTG jack(Micro-AB jack). When a Micro-A connector is inserted, the ID pin is connected to signal ground,causing the OTG port to be configured as a host. If a Micro-B USB connector is inserted, the ID pinis left unbiased and the OTG port will be configured as a slave device. For the USBO1_ID signal apull-up resistor to 3.3V is needed.The USBO1_VBUS input signal is only used if the OTG port is in client mode (Micro-B USBconnector plugged in or by software configured as slave only). The signal is used to detect whethera host is connected on the other end of the USB cable. This signal is 5V tolerant and can beconnected directly to the power supply pin of the USB jack. ESD protection diodes should be usedfor this signal.The USBO1_EN and USBO1_OC# signals are only used when the OTG port is operating in hostmode (Micro-A USB connector is plugged in or the port is configured by software as host only). TheUSBO1_EN signal is used to enable the USB bus power supply if it needs to be switchable. A USBcompliant design needs to detect overcurrent on the USB bus power supply and switch the poweroff should an over-current condition occur. The USBO1_OC# signal is used to signal to the hostcontroller that an over-current condition has occurred. This signal is active-low and requires a pullupresistor on the baseboard.Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com l info@toradex.com Page | 27
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