Apalis Carrier Board Design Guide - Toradex

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Apalis Carrier Board Design Guide3.4 Power SequencesThe Apalis module starts booting as soon as the main voltage rail is applied to the module. If anApalis system should boot directly when the main power is applied to it, the carrier board needs toramp up the 3.3V main voltage for the module as soon as power is applied (e.g. 7-27 V). TheApalis module will ramp up the internal power rails. When this rails are stable, thePOWER_ENABLE_MOCI goes high in order to signal the carrier board that the peripheral suppliesneed to ramp up. The peripheral power rails on the carrier board need to ramp up in a correctsequence. The sequence starts normally with the highest voltage (e.g. 5V) followed by the lowervoltages (e.g. 3.3V then 1.5V and so on). Peripherals normally require that a lower voltage rails isnever present if a higher rail is missing. Check the datasheet of all peripheral components on thecarrier board for a proper sequencing.Especially PCIe devices require stable power supplies for at least 100ms before releasing the reset.The Apalis modules guarantees to apply the reset output RESET_MOCI# not earlier than 120msafter the POWER_ENABLE_MOCI goes high. This gives the carrier board a maximum time of 20msfor ramping up all power rails. Some Apalis module might have longer delay, but in order to becompatible with all Apalis modules, count on the previous stated numbers.State UPG UPG -> RUN RUN7-27V Carrier Board inVCC input for ModuleNormal Power up (OFF -> RUN)Module internal RailsPOWER_ENABLE_MOCIModule internal Reset5V for Perpherals on CB3.3V for Perpherals on CBRESET_MOCI#>0msRESET_MICO#WAKE1_MICO#120msDepending on the operating system, a shutdown sequence can be initiated. Some system maybenefit from shutting down instead of just removing the main power supply since it is possible tobring the mass storage devices to a controlled state. Check whether a shutdown is preferable for acertain operating system. Some operating system may not provide the shutdown function.Since it is not allowed that a lower voltage rail is present when the higher one is already shutdown, the sequence of shutting down the peripheral voltages needs to be considered. The lowervoltages (e.g. peripheral 3.3V) need to ramp down before the higher ones do (e.g. peripheral 5V).Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com l info@toradex.com Page | 64
Reset Sequence (RUN -> Reset -> RUN)Apalis Carrier Board Design GuideStateRUNRUN -> OFFOFF7-27V Carrier Board inVCC input for ModuleModule internal RailsShut Down (RUN -> OFF)POWER_ENABLE_MOCIModule internal Reset5V for Perpherals on CB3.3V for Perpherals on CBRESET_MOCI#>0msRESET_MICO#WAKE1_MICO#Figure 58: Shut-down sequenceWhen the RESET_MICO# is asserted, a reset cycle is initiated. The module internal reset and theexternal reset output RESET_MOCI# are asserted as long as RESET_MICO# is asserted. If the resetinput RESET_MICO# is de-asserted, the internal reset and the RESET_MOCI# will remain low for atleast 1ms until they are also de-asserted and the module starts booting again. This guarantees aminimum reset time of 1ms even if the reset input RESET_MICO# is triggered for a short time.Some Apalis modules may implement a power cycle during reset.State RUNReset RUN7-27V Carrier Board inVCC input for ModuleModule internal RailsPOWER_ENABLE_MOCIModule internal Reset5V for Perpherals on CB3.3V for Perpherals on CBRESET_MOCI#RESET_MICO#WAKE1_MICO#>1msFigure 59: Reset sequence>1msToradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com l info@toradex.com Page | 65
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Apalis Carrier Board Design Guide - Toradex

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