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Philips SemiconductorsVolume 1<strong>UM10139</strong>Chapter 11: I 2 C interfacesReception of the own SlaveAddress and one or more Databytes all are acknowledgedSSLARADATAADATAAP OR S60H80H80HA0HLast data byte received isNot AcknowledgedAP OR S88HArbitration lost as Masterand addressed as SlaveA68HReception of the GeneralCall address and one ormore Data bytesGENERAL CALLADATAADATAAP OR S70h90h90hA0HLast data byte is NotAcknowledgedAP OR S98hArbitration lost as Masterand addressed as Slave byGeneral CallA78hFrom Master to SlaveFrom Slave to MasterDATAAAny number of data bytes and their associated Acknowledge bitsnThis number (contained in I2STA) corresponds to a defined state of the 2 C IbusFig 35. Format and States in the Slave Receiver mode© Koninklijke Philips Electronics N.V. 2005. All rights reserved.User manual Rev. 01 — 15 August 2005 152
Philips Semiconductors<strong>UM10139</strong>Volume 1Chapter 11: I 2 C interfacesReception of the own SlaveAddress and one or moreData bytes all areAcknowledgedSSLARADATAADATAAP OR SA8HB8HC0HArbitration lost as Masterand addressed as SlaveAB0HLast data byte transmitted.Switched to Not AddressedSlave (AA bit in I2CON =“0”)AALL ONESP OR SC8HFrom Master to SlaveFrom Slave to MasterDATAAAny number of data bytes and their associated Acknowledge bitsnThis number (contained in I2STA) corresponds to a defined state of the 2C I busFig 36. Format and States in the Slave Transmitter mode11.8.4 Slave Transmitter modeIn the slave transmitter mode, a number of data bytes are transmitted to a master receiver(see Figure 36). Data transfer is initialized as in the slave receiver mode. When I2ADRand I2CON have been initialized, the I 2 C block waits until it is addressed by its own slaveaddress followed by the data direction bit which must be “1” (R) for the I 2 C block to operatein the slave transmitter mode. After its own slave address and the R bit have beenreceived, the serial interrupt flag (SI) is set and a valid status code can be read fromI2STAT. This status code is used to vector to a state service routine, and the appropriateaction to be taken for each of these status codes is detailed in Table 151. The slavetransmitter mode may also be entered if arbitration is lost while the I 2 C block is in themaster mode (see state 0xB0).If the AA bit is reset during a transfer, the I 2 C block will transmit the last byte of the transferand enter state 0xC0 or 0xC8. The I 2 C block is switched to the not addressed slave modeand will ignore the master receiver if it continues the transfer. Thus the master receiverreceives all 1s as serial data. While AA is reset, the I 2 C block does not respond to its ownslave address or a general call address. However, the I 2 C-bus is still monitored, andaddress recognition may be resumed at any time by setting AA. This means that the AAbit may be used to temporarily isolate the I 2 C block from the I 2 C-bus.© Koninklijke Philips Electronics N.V. 2005. All rights reserved.User manual Rev. 01 — 15 August 2005 153
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UM10139

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