UM10139

Philips SemiconductorsVolume 1UM10139Chapter 4: MAM Module4.9 MAM usage notesTable 34: MAM Timing register (MAMTIM - address 0xE01F C004) bit descriptionBit Symbol Value Description Resetvalue110 6 - MAM fetch cycles are 6 CCLKs in duration111 7 - MAM fetch cycles are 7 CCLKs in durationWarning: These bits set the duration of MAM Flash fetch operationsas listed here. Improper setting of this value may result in incorrectoperation of the device.7:3 - - Reserved, user software should not write ones to reservedbits. The value read from a reserved bit is not defined.NAWhen changing MAM timing, the MAM must first be turned off by writing a zero toMAMCR. A new value may then be written to MAMTIM. Finally, the MAM may be turnedon again by writing a value (1 or 2) corresponding to the desired operating mode toMAMCR.For system clock slower than 20 MHz, MAMTIM can be 001. For system clock between20 MHz and 40 MHz, Flash access time is suggested to be 2 CCLKs, while in systemswith system clock faster than 40 MHz, 3 CCLKs are proposed.© Koninklijke Philips Electronics N.V. 2005. All rights reserved.User manual Rev. 01 — 15 August 2005 49