UM10139

Philips SemiconductorsVolume 1UM10139Chapter 3: System Control Block3.5.6 Multiple external interrupt pinsSoftware can select multiple pins for each of EINT3:0 in the Pin Select registers, which aredescribed in chapter Pin Connect Block on page 75. The external interrupt logic for eachof EINT3:0 receives the state of all of its associated pins from the pins’ receivers, alongwith signals that indicate whether each pin is selected for the EINT function. The externalinterrupt logic handles the case when more than one pin is so selected, differentlyaccording to the state of its Mode and Polarity bits:• In Low-Active Level Sensitive mode, the states of all pins selected for the same EINTxfunctionality are digitally combined using a positive logic AND gate.• In High-Active Level Sensitive mode, the states of all pins selected for the sameEINTx functionality are digitally combined using a positive logic OR gate.• In Edge Sensitive mode, regardless of polarity, the pin with the lowest GPIO portnumber is used. (Selecting multiple pins for an EINTx in edge-sensitive mode couldbe considered a programming error.)The signal derived by this logic processing multiple external interrupt pins is the EINTisignal in the following logic schematic Figure 8.For example, if the EINT3 function is selected in the PINSEL0 and PINSEL1 registers forpins P0.9, P0.20 and P0.30, and EINT3 is configured to be low level sensitive, the inputsfrom all three pins will be logically ANDed. When more than one EINT pin is logicallyORed, the interrupt service routine can read the states of the pins from the GPIO portusing the IO0PIN and IO1PIN registers, to determine which pin(s) caused the interrupt.Wakeup enable(one bit of EXTWAKE)VPB Readof EXTWAKEVPB Bus DataDQEINTi toWakeup Timer(Figure 11)EINTiGLITCHFILTERPCLKEXTPOLARiInterrupt Flag(one bit of EXTINT)1DSSSQQQto VICEXTMODEiRRPCLKRPCLKVPB Readof EXTINTResetWrite 1 to EXTINTiFig 8.External interrupt logic© Koninklijke Philips Electronics N.V. 2005. All rights reserved.User manual Rev. 01 — 15 August 2005 25