UM10139

Philips SemiconductorsVolume 1UM10139Chapter 14: USB Device Controllerinterrupts will be routed to the low priority interrupt line if the EP_FAST bit is set to 0,irrespective of the Endpoint Interrupt Priority register (Section 14.7.11) setting. TheUSBDevIntPri is a write only register.Table 184: USB Device Interrupt Priority register (USBDevIntPri - address 0xE009 002C) bit descriptionBit Symbol Value Description Reset value0 FRAME 0 FRAME interrupt is routed to the low priority interrupt line. 01 FRAME interrupt is routed to the high priority interrupt line.1 EP_FAST 0 EP_FAST interrupt is routed to the low priority interrupt line. 01 EP_FAST interrupt is routed to the high priority interrupt line.7:2 - - Reserved, user software should not write ones to reserved bits. The valueread from a reserved bit is not defined.14.7.7 USB Endpoint Interrupt Status register (USBEpIntSt - 0xE009 0030)Each physical non-isochronous endpoint is represented by one bit in this register toindicate that it has generated the interrupt. All non-isochronous OUT endpoints give aninterrupt when they receive a packet without any error. All non-isochronous IN endpointswill give an interrupt when a packet is successfully transmitted or a NAK handshake issent on the bus provided that the interrupt on NAK feature is enabled. Isochronousendpoint transfer takes place with respect to frame interrupt. The USBEpIntSt is a readonly register.Table 185: USB Endpoint Interrupt Status register (USBEpIntSt - address 0xE009 0030) bit allocationReset value: 0x0000 0000Bit 31 30 29 28 27 26 25 24Symbol EP15TX EP15RX EP14TX EP14RX EP13TX EP13RX EP12TX EP12RXBit 23 22 21 20 19 18 17 16Symbol EP11TX EP11RX EP10TX EP10RX EP9TX EP9RX EP8TX EP8RXBit 15 14 13 12 11 10 9 8Symbol EP7TX EP7RX EP6TX EP6RX EP5TX EP5RX EP4TX EP4RXBit 7 6 5 4 3 2 1 0Symbol EP3TX EP3RX EP2TX EP2RX EP1TX EP1RX EP0TX EP0RXNATable 186: USB Endpoint Interrupt Status register (USBEpIntSt - address 0xE009 0030) bit descriptionBit Symbol Description Reset value0 EP0RX Endpoint 0, Data Received Interrupt bit. 01 EP0TX Endpoint 0, Data Transmitted Interrupt bit or sent a NAK. 02 EP1RX Endpoint 1, Data Received Interrupt bit. 03 EP1TX Endpoint 1, Data Transmitted Interrupt bit or sent a NAK. 04 EP2RX Endpoint 2, Data Received Interrupt bit. 05 EP2TX Endpoint 2, Data Transmitted Interrupt bit or sent a NAK. 06 EP3RX Endpoint 3, Isochronous endpoint. NA7 EP3TX Endpoint 3, Isochronous endpoint. NA8 EP4RX Endpoint 4, Data Received Interrupt bit. 09 EP4TX Endpoint 4, Data Transmitted Interrupt bit or sent a NAK. 010 EP5RX Endpoint 5, Data Received Interrupt bit. 09397 750 XXXXX © Koninklijke Philips Electronics N.V. 2005. All rights reserved.User manual Rev. 01 — 15 August 2005 204