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Philips SemiconductorsVolume 1UM10139Chapter 14: USB Device ControllerTable 174: USB device register mapName Description Access Reset value [1] AddressUSBNDDRIntSet USB New DD Request Interrupt Set WO 0x0000 0000 0xE009 00B4USBSysErrIntSt USB System Error Interrupt Status RO 0x0000 0000 0xE009 00B8USBSysErrIntClr USB System Error Interrupt Clear WO 0x0000 0000 0xE009 00BCUSBSysErrIntSet USB System Error Interrupt Set WO 0x0000 0000 0xE009 00C0[1] Reset value reflects the data stored in used bits only. It does not include reserved bits content.14.7 USB Device register definitions14.7.1 USB Interrupt Status register (USBIntSt - 0xE01F C1C0)The USB device has three interrupt output lines. The interrupts usb_int_req_Ip andusb_int_req_hp facilitates transfer of data in slave mode. These two interrupt lines areprovided to allow two different priority (high/low) levels in slave mode transfer. Each of theindividual endpoint interrupts can be routed to either high priority or low priority levelsusing corresponding bits in the Endpoint Interrupt Priority register (Section 14.7.11). Theinterrupt level is triggered with active high polarity. The external interrupt generation takesplace only if the necessary ‘enable’ bits are set in the Device Interrupt Enable register(Section 14.7.3). Otherwise, they will be registered only in the status registers. Theusb_int_req_dma is raised when an end_of_transfer or a system error has occurred. DMAdata transfer is not dependent on this interrupt.The three interrupt output lines are ORed together to reduce the number of interruptchannels required for the USB device in the vectored interrupt controller. This registerreflects the status of the each interrupt line. The USBIntSt is a read/write register.Table 175: USB Interrupt Status register (USBIntSt - address 0xE01F C1C0) bit descriptionBit Symbol Description Resetvalue0 USB_INT_REQ_LP Low priority interrupt line status. This bit is read only. 01 USB_INT_REQ_HP High priority interrupt line status. This bit is read only. 02 USB_INT_REQ_DMA DMA interrupt line status. This bit is read only. (LPC2146/8 only) 07:3 - Reserved, user software should not write ones to reserved bits. The NAvalue read from a reserved bit is not defined.9397 750 XXXXX © Koninklijke Philips Electronics N.V. 2005. All rights reserved.User manual Rev. 01 — 15 August 2005 200