UM10139

Philips SemiconductorsVolume 1UM10139Chapter 11: I 2 C interfacesTable 152: Miscellaneous StatesStatusCode(I2CSTAT)0xF80x00Status of the I 2 C-busand hardwareNo relevant stateinformation available;SI = 0.Bus error during MSTor selected slavemodes, due to anillegal START orSTOP condition. State0x00 can also occurwhen interferencecauses the I 2 C blockto enter an undefinedstate.Application software responseNext action taken by I 2 C hardwareTo/From I2DAT To I2CONSTA STO SI AANo I2DAT action No I2CON action Wait or proceed current transfer.No I2DAT action 0 1 0 X Only the internal hardware is affected inthe MST or addressed SLV modes. In allcases, the bus is released and the I 2 Cblock is switched to the not addressedSLV mode. STO is reset.11.8.8 Some special casesThe I 2 C hardware has facilities to handle the following special cases that may occur duringa serial transfer:11.8.9 Simultaneous repeated START conditions from two mastersA repeated START condition may be generated in the master transmitter or masterreceiver modes. A special case occurs if another master simultaneously generates arepeated START condition (see Figure 37). Until this occurs, arbitration is not lost by eithermaster since they were both transmitting the same data.If the I 2 C hardware detects a repeated START condition on the I 2 C-bus before generatinga repeated START condition itself, it will release the bus, and no interrupt request isgenerated. If another master frees the bus by generating a STOP condition, the I 2 C blockwill transmit a normal START condition (state 0x08), and a retry of the total serial datatransfer can commence.11.8.10 Data transfer after loss of arbitrationArbitration may be lost in the master transmitter and master receiver modes (seeFigure 31). Loss of arbitration is indicated by the following states in I2STAT; 0x38, 0x68,0x78, and 0xB0 (see Figure 33 and Figure 34).If the STA flag in I2CON is set by the routines which service these states, then, if the busis free again, a START condition (state 0x08) is transmitted without intervention by theCPU, and a retry of the total serial transfer can commence.11.8.11 Forced access to the I 2 C-busIn some applications, it may be possible for an uncontrolled source to cause a bushang-up. In such situations, the problem may be caused by interference, temporaryinterruption of the bus or a temporary short-circuit between SDA and SCL.© Koninklijke Philips Electronics N.V. 2005. All rights reserved.User manual Rev. 01 — 15 August 2005 160