UM10139

Philips SemiconductorsVolume 1UM10139Chapter 3: System Control BlockTable 19: PLL Control bit combinationsPLLC PLLE PLL Function0 0 PLL is turned off and disconnected. The CCLK equals the unmodified clockinput. This combination can not be used in case of the PLL1 since there will beno 48 MHz clock and the USB can not operate.0 1 The PLL is active, but not yet connected. The PLL can be connected afterPLOCK is asserted.1 0 Same as 00 combination. This prevents the possibility of the PLL beingconnected without also being enabled.1 1 The PLL is active and has been connected. CCLK/system clock is sourcedfrom the PLL0 and the USB clock is sourced from the PLL1.3.8.7 PLL Feed register (PLL0FEED - 0xE01F C08C, PLL1FEED -0xE01F C0AC)A correct feed sequence must be written to the PLLFEED register in order for changes tothe PLLCON and PLLCFG registers to take effect. The feed sequence is:1. Write the value 0xAA to PLLFEED.2. Write the value 0x55 to PLLFEED.The two writes must be in the correct sequence, and must be consecutive VPB buscycles. The latter requirement implies that interrupts must be disabled for the duration ofthe PLL feed operation. If either of the feed values is incorrect, or one of the previouslymentioned conditions is not met, any changes to the PLLCON or PLLCFG register will notbecome effective.Table 20: PLL Feed register (PLL0FEED - address 0xE01F C08C, PLL1FEED - address0xE01F C0AC) bit descriptionBit Symbol Description Resetvalue7:0 PLLFEED The PLL feed sequence must be written to this register in order forPLL configuration and control register changes to take effect.0x003.8.8 PLL and Power-down modePower-down mode automatically turns off and disconnects activated PLL(s). Wakeup fromPower-down mode does not automatically restore the PLL settings, this must be done insoftware. Typically, a routine to activate the PLL, wait for lock, and then connect the PLLcan be called at the beginning of any interrupt service routine that might be called due tothe wakeup. It is important not to attempt to restart the PLL by simply feeding it whenexecution resumes after a wakeup from Power-down mode. This would enable andconnect the PLL at the same time, before PLL lock is established.If activity on the USB data lines is not selected to wake up the microcontroller fromPower-down mode (see Section 3.5.3 “Interrupt Wakeup register (INTWAKE -0xE01F C144)” on page 22), both the system and the USB PLL will be automatically beturned off and disconnected when Power-down mode is invoked, as described above.However, in case USBWAKE = 1 and USB_need_clock = 1 it is not possible to go intoPower-down mode and any attempt to set the PD bit will fail, leaving the PLLs in thecurrent state.© Koninklijke Philips Electronics N.V. 2005. All rights reserved.User manual Rev. 01 — 15 August 2005 32