UM10139

Philips SemiconductorsVolume 1UM10139Chapter 12: SPITable 155: SPI register mapName Description Access Reset Addressvalue [1]S0SPCR SPI Control Register. This register controls the R/W 0x00 0xE002 0000operation of the SPI.S0SPSR SPI Status Register. This register shows the RO 0x00 0xE002 0004status of the SPI.S0SPDR SPI Data Register. This bi-directional register R/W 0x00 0xE002 0008provides the transmit and receive data for theSPI. Transmit data is provided to the SPI0 bywriting to this register. Data received by the SPI0can be read from this register.S0SPCCR SPI Clock Counter Register. This register R/W 0x00 0xE002 000Ccontrols the frequency of a master’s SCK0.S0SPINT SPI Interrupt Flag. This register contains theinterrupt flag for the SPI interface.R/W 0x00 0xE002 001C[1] Reset value reflects the data stored in used bits only. It does not include reserved bits content.12.4.1 SPI Control Register (S0SPCR - 0xE002 0000)The S0SPCR register controls the operation of the SPI0 as per the configuration bitssetting.Table 156: SPI Control Register (S0SPCR - address 0xE002 0000) bit descriptionBit Symbol Value Description Resetvalue1:0 - Reserved, user software should not write ones to NAreserved bits. The value read from a reserved bit is notdefined.2 BitEnable 0 The SPI controller sends and receives 8 bits of data per 0transfer.1 The SPI controller sends and receives the number of bitsselected by bits 11:8.3 CPHAClock phase control determines the relationship between 00the data and the clock on SPI transfers, and controlswhen a slave transfer is defined as starting and ending.Data is sampled on the first clock edge of SCK. A transferstarts and ends with activation and deactivation of theSSEL signal.1 Data is sampled on the second clock edge of the SCK. Atransfer starts with the first clock edge, and ends with thelast sampling edge when the SSEL signal is active.4 CPOLClock polarity control.00 SCK is active high.1 SCK is active low.5 MSTRMaster mode select.00 The SPI operates in Slave mode.1 The SPI operates in Master mode.© Koninklijke Philips Electronics N.V. 2005. All rights reserved.User manual Rev. 01 — 15 August 2005 176