UM10139

Philips SemiconductorsVolume 1UM10139Chapter 16: PWMTable 249: PWM Timer Control Register (PWMTCR - address 0xE001 4004) bit descriptionBit Symbol Description Reset value0 Counter Enable When one, the PWM Timer Counter and PWM Prescale 0Counter are enabled for counting. When zero, thecounters are disabled.1 Counter Reset When one, the PWM Timer Counter and the PWM 0Prescale Counter are synchronously reset on the nextpositive edge of PCLK. The counters remain reset untilTCR[1] is returned to zero.2 - Reserved, user software should not write ones to NAreserved bits. The value read from a reserved bit is notdefined.3 PWM Enable When one, PWM mode is enabled. PWM mode causes 0shadow registers to operate in connection with theMatch registers. A program write to a Match register willnot have an effect on the Match result until thecorresponding bit in PWMLER has been set, followed bythe occurrence of a PWM Match 0 event. Note that thePWM Match register that determines the PWM rate(PWM Match 0) must be set up prior to the PWM beingenabled. Otherwise a Match event will not occur tocause shadow register contents to become effective.7:4 - Reserved, user software should not write ones toreserved bits. The value read from a reserved bit is notdefined.NA16.4.3 PWM Timer Counter (PWMTC - 0xE001 4008)The 32-bit PWM Timer Counter is incremented when the Prescale Counter reaches itsterminal count. Unless it is reset before reaching its upper limit, the PWMTC will count upthrough the value 0xFFFF FFFF and then wrap back to the value 0x0000 0000. This eventdoes not cause an interrupt, but a Match register can be used to detect an overflow ifneeded.16.4.4 PWM Prescale Register (PWMPR - 0xE001 400C)The 32-bit PWM Prescale Register specifies the maximum value for the PWM PrescaleCounter.16.4.5 PWM Prescale Counter register (PWMPC - 0xE001 4010)The 32-bit PWM Prescale Counter controls division of PCLK by some constant valuebefore it is applied to the PWM Timer Counter. This allows control of the relationship of theresolution of the timer versus the maximum time before the timer overflows. The PWMPrescale Counter is incremented on every PCLK. When it reaches the value stored in thePWM Prescale Register, the PWM Timer Counter is incremented and the PWM PrescaleCounter is reset on the next PCLK. This causes the PWM TC to increment on every PCLKwhen PWMPR = 0, every 2 PCLKs when PWMPR = 1, etc.© Koninklijke Philips Electronics N.V. 2005. All rights reserved.User manual Rev. 01 — 15 August 2005 260