UM10139

More documents

Recommendations

Info

Philips SemiconductorsVolume 1<strong>UM10139</strong>Chapter 12: SPITable 157: SPI Status Register (S0SPSR - address 0xE002 0004) bit descriptionBit Symbol Description Reset value5 ROVR Read overrun. When 1, this bit indicates that a read overrun has 0occurred. This bit is cleared by reading this register.6 WCOL Write collision. When 1, this bit indicates that a write collision 0has occurred. This bit is cleared by reading this register, thenaccessing the SPI data register.7 SPIF SPI transfer complete flag. When 1, this bit indicates when a SPIdata transfer is complete. When a master, this bit is set at theend of the last cycle of the transfer. When a slave, this bit is seton the last data sampling edge of the SCK. This bit is cleared byfirst reading this register, then accessing the SPI data register.Note: this is not the SPI interrupt flag. This flag is found in theSPINT register.012.4.3 SPI Data Register (S0SPDR - 0xE002 0008)This bi-directional data register provides the transmit and receive data for the SPI.Transmit data is provided to the SPI by writing to this register. Data received by the SPIcan be read from this register. When a master, a write to this register will start a SPI datatransfer. Writes to this register will be blocked from when a data transfer starts to when theSPIF status bit is set, and the status register has not been read.Table 158: SPI Data Register (S0SPDR - address 0xE002 0008) bit descriptionBit Symbol Description Reset value7:0 DataLow SPI Bi-directional data port. 0x0015:8 DataHigh If bit 2 of the SPCR is 1 and bits 11:8 are other than 1000, someor all of these bits contain the additional transmit and receivebits. When less than 16 bits are selected, the more significantamong these bits read as zeroes.0x0012.4.4 SPI Clock Counter Register (S0SPCCR - 0xE002 000C)This register controls the frequency of a master’s SCK. The register indicates the numberof PCLK cycles that make up an SPI clock. The value of this register must always be aneven number. As a result, bit 0 must always be 0. The value of the register must alsoalways be greater than or equal to 8. Violations of this can result in unpredictablebehavior.Table 159: SPI Clock Counter Register (S0SPCCR - address 0xE002 000C) bit descriptionBit Symbol Description Reset value7:0 Counter SPI0 Clock counter setting. 0x00The SPI0 rate may be calculated as: PCLK / SPCCR0 value. The PCLK rate isCCLK /VPB divider rate as determined by the VPBDIV register contents.12.4.5 SPI Interrupt register (S0SPINT - 0xE002 001C)This register contains the interrupt flag for the SPI0 interface.© Koninklijke Philips Electronics N.V. 2005. All rights reserved.User manual Rev. 01 — 15 August 2005 178
Philips SemiconductorsVolume 1<strong>UM10139</strong>Chapter 12: SPITable 160: SPI Interrupt register (S0SPINT - address 0xE002 001C) bit descriptionBit Symbol Description Reset value0 SPI Interrupt SPI interrupt flag. Set by the SPI interface to generate an interrupt. Cleared 0Flagby writing a 1 to this bit.Note: this bit will be set once when SPIE = 1 and at least one of SPIF andWCOL bits is 1. However, only when the SPI Interrupt bit is set and SPI0Interrupt is enabled in the VIC, SPI based interrupt can be processed byinterrupt handling software.7:1 - Reserved, user software should not write ones to reserved bits. The valueread from a reserved bit is not defined.NA12.5 ArchitectureThe block diagram of the SPI solution implemented in SPI0 interface is shown in theFigure 41.SPI SHIFT REGISTERMOSI_INMOSI_OUTMISO_INMISO_OUTSPI InterruptSPI CLOCKGENERATOR &DETECTORSCK_INSCK_OUTSS_INVPB BusSPI REGISTERINTERFACESPI STATE CONTROLOUTPUTENABLELOGICSCK_OUT_ENMOSI_OUT_ENMISO_OUT_ENFig 41. SPI block diagram© Koninklijke Philips Electronics N.V. 2005. All rights reserved.User manual Rev. 01 — 15 August 2005 179
Page 1 and 2:
UM10139Volume 1: LPC214x User Manua
Page 3 and 4:
UM10139Chapter 1: General informati
Page 5 and 6:
Philips SemiconductorsVolume 1UM101
Page 7 and 8:
Page 9 and 10:
Page 11 and 12:
Page 13 and 14:
Page 15 and 16:
Page 17 and 18:
Page 19 and 20:
Page 21 and 22:
Page 23 and 24:
Page 25 and 26:
Page 27 and 28:
Page 29 and 30:
Page 31 and 32:
Page 33 and 34:
Page 35 and 36:
Page 37 and 38:
Page 39 and 40:
Philips SemiconductorsUM10139Volume
Page 41 and 42:
Page 43 and 44:
Page 45 and 46:
Page 47 and 48:
Page 49 and 50:
Page 51 and 52:
Page 53 and 54:
Page 55 and 56:
Page 57 and 58:
Page 59 and 60:
Page 61 and 62:
Page 63 and 64:
Page 65 and 66:
Page 67 and 68:
Page 69 and 70:
Page 71 and 72:
Page 73 and 74:
Page 75 and 76:
UM10139Chapter 7: Pin Connect Block
Page 77 and 78:
Page 79 and 80:
Page 81 and 82:
UM10139Chapter 8: General Purpose I
Page 83 and 84:
Page 85 and 86:
Page 87 and 88:
Page 89 and 90:
Page 91 and 92:
Page 93 and 94:
Page 95 and 96:
UM10139Chapter 9: Universal Asynchr
Page 97 and 98:
Page 99 and 100:
Page 101 and 102:
Page 103 and 104:
Page 105 and 106:
Page 107 and 108:
Page 109 and 110:
Page 111 and 112:
Page 113 and 114:
Page 115 and 116:
Page 117 and 118:
Page 119 and 120:
Page 121 and 122:
Page 123 and 124:
Page 125 and 126:
Page 127 and 128: Philips SemiconductorsVolume 1UM101
Page 133 and 134: UM10139Chapter 11: I 2 C interfaces
Page 153 and 154: Philips SemiconductorsUM10139Volume
Page 171 and 172: UM10139Chapter 12: SPI Interface (S
Page 177: Philips SemiconductorsVolume 1UM101
Page 229 and 230:
Page 231 and 232:
Page 233 and 234:
Page 235 and 236:
Page 237 and 238:
Page 239 and 240:
Page 241 and 242:
Page 243 and 244:
Page 245 and 246:
Page 247 and 248:
Page 249 and 250:
Page 251 and 252:
Page 253 and 254:
UM10139Chapter 16: Pulse Width Modu
Page 255 and 256:
Page 257 and 258:
Page 259 and 260:
Page 261 and 262:
Page 263 and 264:
Page 265 and 266:
UM10139Chapter 17: Analog-to-Digita
Page 267 and 268:
Page 269 and 270:
Page 271 and 272:
Page 273 and 274:
UM10139Chapter 18: Digital-to-Analo
Page 275 and 276:
UM10139Chapter 19: Real Time ClockR
Page 277 and 278:
Page 279 and 280:
Page 281 and 282:
Page 283 and 284:
Page 285 and 286:
Page 287 and 288:
UM10139Chapter 20: Watchdog TimerRe
Page 289 and 290:
Page 291 and 292:
UM10139Chapter 21: Flash Memory Sys
Page 293 and 294:
Page 295 and 296:
Page 297 and 298:
Page 299 and 300:
Page 301 and 302:
Page 303 and 304:
Page 305 and 306:
Page 307 and 308:
Page 309 and 310:
Page 311 and 312:
Page 313 and 314:
Page 315 and 316:
UM10139Chapter 23: Embedded Trace M
Page 317 and 318:
Page 319 and 320:
UM10139Chapter 24: RealMonitorRev.
Page 321 and 322:
Page 323 and 324:
Page 325 and 326:
Page 327 and 328:
Page 329 and 330:
UM10139Chapter 25: Supplementary in
Page 331 and 332:
Page 333 and 334:
Page 335 and 336:
Page 337 and 338:
Page 339 and 340:
Page 341 and 342:
Page 343 and 344:
Page 345 and 346:
Page 347 and 348:
show all

UM10139

Create successful ePaper yourself

Delete template?

Save as template?