Qualification of the Assembly Process of Flip-Chip BGA Packages ...

Texas Tech University, Nivetha Shivan, May 2012
CHAPTER 4
TECHNIQUES USED IN QUALIFICATION
This chapter deals with the techniques that are used in qualification of the FC package for
the new product. Firstly, the technique which is used to measure the Warpage of the
package is discussed. This measurement is done in Phase I of the pre-engineering
qualification. Secondly, the stress tests such as MSL3 pre-conditioning, Temperature
cycling and Pressure cooker test are discussed. These tests are done in both Phase I and
Phase II. Thirdly, the technique used for verifying the devices‟ electrical functionality is
discussed. Lastly, the techniques used to locate the physical failures in a package, such as
CSAM and cross section analysis are discussed.
4.1 Warpage Measurement Technique (Phase I) [12]
Warpage is the out-of-plane displacement of a semiconductor package. The stress present
in the package interfaces due to reasons like different CTE of the materials causes the
package to bend from the original planar surface. This could lead to electrical failures in
the package as the bonding between the die and the substrate could have been misplaced
due to the displacements. This makes it important to measure the warpage of a
semiconductor package.
A technique called Shadow moiré is used to measure the warpage. The method mainly
uses the following apparatus to perform the measurement:
1. Quartz glass etched with equally spaced parallel lines
2. White light source
3. Camera
The quartz glass is placed parallel to the IC package whose warpage needs to be
measured. A beam of white light is directed onto the grated glass plate. The white light is
used only for illumination. Shadows of the etched lines are formed on the top surface of
the package. The geometric interference between the actual etched lines and their
shadows on the package surface forms moiré patterns which is viewed from a different
22