Qualification of the Assembly Process of Flip-Chip BGA Packages ...
Qualification of the Assembly Process of Flip-Chip BGA Packages ...
Qualification of the Assembly Process of Flip-Chip BGA Packages ...
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4.3.1.3 Leakage Test<br />
Texas Tech University, Nivetha Shivan, May 2012<br />
Ideally, <strong>the</strong> input pin in a DUT would have infinite impedance and no current would flow<br />
into or out <strong>of</strong> <strong>the</strong> pin; but in reality <strong>the</strong> input pin will have very large (finite) impedance<br />
which results in a very small value <strong>of</strong> current flowing into or out <strong>of</strong> <strong>the</strong> pin. This small<br />
current is called leakage current. The purpose <strong>of</strong> this test is to measure this leakage<br />
current that flows into or out <strong>of</strong> <strong>the</strong> functional pins. This test targets to detect <strong>the</strong> physical<br />
defects in <strong>the</strong> DUT which is a result <strong>of</strong> <strong>the</strong> process variations.<br />
Input leakage low test (IIL) is done by applying VDDmax to all <strong>the</strong> pins and using PMU<br />
(parametric measurement unit) to force 0V to <strong>the</strong> individual input pins and measuring <strong>the</strong><br />
resultant current. The magnitude <strong>of</strong> <strong>the</strong> measured current should be below <strong>the</strong> spec limit.<br />
Input leakage high test (IIH) is done by applying 0V to all <strong>the</strong> pins and using PMU<br />
(parametric measurement unit) to force VDDmax to <strong>the</strong> individual input pins and<br />
measuring <strong>the</strong> resultant current. The measured current should be below <strong>the</strong> spec limit.<br />
The purpose <strong>of</strong> <strong>the</strong> output leakage test is to measure <strong>the</strong> leakage current that flows into or<br />
out <strong>of</strong> <strong>the</strong> output pins when it is in <strong>the</strong> <strong>of</strong>f state.<br />
The output leakage low test is done by making <strong>the</strong> output and I/O pins to go to tristate<br />
(high impedance state; making <strong>the</strong> output to go to this state allows no output signals to be<br />
generated) and applying 0V to <strong>the</strong> individual output pins using PMU and measuring <strong>the</strong><br />
resultant current. The magnitude <strong>of</strong> <strong>the</strong> measured current should be below <strong>the</strong> spec limit.<br />
The output leakage high test is done by making <strong>the</strong> output and I/O pins to go to tristate<br />
and by applying VDDmax to <strong>the</strong> individual output pins using PMU and measuring <strong>the</strong><br />
resultant current. The measured current should be below <strong>the</strong> spec limit.<br />
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