mitac 8599.pdf - tim.id.au
mitac 8599.pdf - tim.id.au
mitac 8599.pdf - tim.id.au
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8599 N/B Maintenance<br />
- Supports zero-wait state for contiguous CPU write data<br />
- Supports 128K/256K/512K/1M/2M/4M/8M/16M TSEG SMRAM<br />
- Supports Defer Function to maximize bus utilization<br />
- Supports Dynamic Bus Inversion<br />
- AGTL+ & AGTL compliant bus driver with <strong>au</strong>to compensation<br />
64 Bit High Performance DDR400/DDR333/DDR266 Memory Controller<br />
- Supports DDR400/DDR333/DDR266 SDRAM<br />
- Supports up to 2 un-buffered DIMM DDR400<br />
- Supports up to 3 un-buffered DIMM DDR333<br />
- Up to 1 GB per DIMM with maximum memory size up to 3 GB<br />
- Supports 32Mb, 64Mb, 128Mb, 256Mb, 512Mb, 1Gb SDRAM technology with page size from 2KB up to 32 KB<br />
- Supports up to 24 open pages<br />
- Sustains DDR SDRAM CAS Latency at options of 2, 2.5, & 3 clocks<br />
- Auto-compensation SSTL-2.5v driver op<strong>tim</strong>izing for performance and stability<br />
- Supports Suspend to DRAM function<br />
- Programmable shared frame buffer size 32MB or 64MB for display memory<br />
- 128KB SMRAM space re-mapping to A0000h, B0000h, or E0000h<br />
Integrated A.G.P. Compliant Target/66MHz Host-to-PCI Br<strong>id</strong>ge<br />
- Universal AGP v3.0 Compliant<br />
- Support 1.5V AGP Interface Only<br />
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