mitac 8599.pdf - tim.id.au

8
Clock Generator/Buffer
7
6
5
* INTERNAL PULL UP RESISTOR
Bit2 Bit7 Bit6 Bit5 Bit4
** INTERNAL PULL DOWN RESISTOR
FS4 FS3 FS2 FS1 FS0 CPU SDRAM ZCLK AGP PCI
~ THIS OUTPUT HAS 1.5X DRIVE STRENGTH
0 0 0 0 0 100.20 100.20 66.8 66.8 33.4
0 0 0 0 1 100.20 133.60 66.8 66.8 33.4
0 0 0 1 0 100.20 200.4 66.8 66.8 33.4
+3VS
L48
U13
0
0
0
0
0
1
1
0
1
0
100.20
133.60
167.00
100.20
66.8
66.8
66.8
66.8
33.4
33.4
D
1 2
120Z/100M
1608
+3VS
L47
1 2
120Z/100M
1608
C161 C186 C148
0.1U 0.1U 0.1U
0402 0402 0402
+80-20% +80-20% +80-20%
16V 16V 16V
STP_PCI#
[13] STP_PCI#
CPU_STP#
[13,28] CPU_STP#
C151 C140
0.1U 0.1U
0402 0402
+80-20% +80-20%
16V 16V
1
VDDREF
11
VDDZ
13
VDDPCI0
19
VDDPCI1
28
VDDA48
29
VDDAGP
42
VDDCPU
48
VDDSD
12
*PCI_STOP#/PCICLK6
45
CPU_STOP#*
5
GNDREF
8
GNDZ
18
GNDPCI0
24
GNDPCI1
25
GND48
32
GNDAGP
41
GNDCPU
46
GNDSD
CPUCLKT_0
40
CPUCLKC_0
39
CPUCLKT_1
44
CPUCLKC_1
43
SDRAM
47
AGPCLK0
31
AGPCLK1
30
ZCLK0
9
ZCLK1
10
R175 1
R176 1
R173 1
R174 1
R179 1
R214 1
R215 1
2 33 0402 HCLK_CPU
2 33 0402 HCLK_CPU#
2 33 0402 HCLK_SISM661FX
2 33 0402 HCLK_SISM661FX#
2 22 0402 AGP_CLK
2 22 0402 ZCLK0
2 22 0402 ZCLK1
HCLK_CPU [4]
HCLK_CPU# [4]
HCLK_SISM661FX [6]
HCLK_SISM661FX# [6]
AGP_CLK [6]
ZCLK0 [6]
ZCLK1 [12]
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
133.60
133.60
133.60
200.05
200.05
200.05
200.05
166.70
166.70
160.04
133.60
200.40
167.00
100.03
133.37
200.05
160.04
100.20
133.36
200.05
66.8
66.8
66.8
66.68
66.68
66.68
66.68
66.68
66.8
66.68
66.8
66.8
66.8
66.68
66.68
66.68
66.68
66.68
66.8
66.68
33.4
33.4
33.4
33.34
33.34
33.34
33.34
33.34
33.4
33.34
D
+VCC_CORE +3VS
R135
10K R134
0402 10K
5%
0402
5%
B
B
Q13
+3VS
R169
10K
0402
5%
Q17
MMBT3904L
R168 1
VTT_PWRGD
2 475 1%
0402
**FS3/PCICLK_F0
14
**FS4/PCICLK_F1
15
*MODE0/PCICLK0
16
PCICLK1
17
PCICLK2
20
PCICLK3
21
PCICLK4
22
PCICLK5
23
33
PD#*/VTT_PWRGD **FS0/REF0
2
**FS1/REF1
3
**FS2/REF2
4
38
IREF
12_48MHZ/SEL12_48#*
27
24_48MHZ/SEL24_48#*~
26
FS3
FS4
FS0
FS2
R217 1
R219 1
R220 1
R221 1
R206 1
R200 1
R201 1
R212 1
R190 1
R194 1
R186 1
R180 1
2 33 0402 CLK_SBPCI
2 33 0402 PCI_KBCLK
2 33 0402 PCICLK_CARD
2 33 0402 PCICLK_FWH
2 33 0402 CLK_MINIPCI
2 33 0402 14.318MHZ_TV
2 33 0402 REFCLK0
2 33 0402 REFCLK1
2 10K 0402
USB12M_SB
+3VS
2 22 0402
2 22 0402 USBCLK_SB
2 22 0402 CLK_SIO
CLK_SBPCI [12]
PCI_KBCLK [20]
PCICLK_CARD [16]
PCICLK_FWH [18]
CLK_MINIPCI [21]
14.318MHZ_TV [8]
REFCLK0 [6]
REFCLK1 [13]
USB12M_SB [14]
USBCLK_SB [14]
CLK_SIO [21]
+12VS
R133
10K
Q16
0402
2N7002 5%
Q12
S D S D 2N7002
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
166.7
100.20
100.20
100.20
100.20
133.60
133.60
133.60
166.7
100.02
133.60
200.40
167.00
100.20
133.60
200.40
66.68
133.60
133.60
133.60
133.60
133.60
133.60
133.60
66.68
66.8
66.8
66.8
66.8
66.8
66.8
66.8
33.34
33.4
33.4
33.4
33.4
33.4
33.4
33.4
C
MMBT3904L
+3VS
L46 120Z/100M
1 2
C138
1608
0.1U
0402
+80-20%
16V
C144
0.1U
0402
+80-20%
16V
C150
1000P
0402
10%
50V
36
VDDA
37
GNDA
ICS952007
SSOP48
SCLK
35
SDATA
34
SMBus
R181
10K address: D2h
0402 by BIOS
5%
Layout note: Place crystal within
500 mils of CLK Gen.
ASMBCLK
ASMBDATA
+3VS
R178 4.7K 0402
1 2
1 2
R177 4.7K 0402
SMBCLK
SMBDATA
SMBCLK [9,13]
SMBDATA [9,13]
1
1
1
1
1
1
1
0
1
1
1
1
1
1
1
0
0
0
0
1
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
133.60
200.05
200.05
200.05
200.05
166.70
166.70
167.00
100.03
133.37
200.05
160.04
100.20
133.36
133.60
133.37
133.37
133.37
133.37
133.60
133.60
66.8
66.68
66.68
66.68
66.68
66.68
66.8
33.4
33.34
33.34
33.34
33.34
33.4
33.4
C
1 1 1 1 0 160.04 200.05 133.37 66.68 33.34
X3
1 2
1 1 1 1 1 166.70 166.70 133.37 66.68 33.34
14.31818MHZ
C195
22P
0603
5%
C196
22P
0603
5%
BSEL1 BSEL0
L L
FREQ
100MHz
DEFAULT
SMBus
L H 133MHz
address: D4h
by BIOS
H
H
L
H
200MHz
RSVD
VDD_MEM2.5
L61 120Z/100M
1 2
1608
[6] FWDSDCLKO
C254 C233
0.1U 0.1U
0402 0402
ASMBCLK
ASMBDATA
BF_OUT
FWDSDCLKO
U19
7
SCLK
22
SDATA
20
FBINT
8
CLK_INT
3
VDD0
12
VDD1
23
VDD2
10
VDDA
FB_OUTT
19
CLKT0
2
CLKC0
1
CLKT1
4
CLKC1
5
CLKT2
13
CLKC2
14
R256 1
R279 1
R278 1
R281 1
R282 1
R284 1
R285 1
2 22 0402
2 0_DFS 0402CLK_DDR0
2 0_DFS 0402CLK_DDR0#
2 0_DFS 0402CLK_DDR1
2 0_DFS 0402CLK_DDR1#
2 0_DFS 0402CLK_DDR2
2 0_DFS 0402CLK_DDR2#
CLK_DDR0 [9]
CLK_DDR0# [9]
CLK_DDR1 [9]
CLK_DDR1# [9]
CLK_DDR2 [9]
CLK_DDR2# [9]
Bit2 Bit7 Bit6 Bit5 Bit4
FS4 FS3 FS2 FS1 FS0
0 0 0 0 0
0 0 0 0 1
For ICS952007
CPU SDRAM ZCLK AGP
100.00 100.00 133.33 66.66
100.99 133.99 134.65 67.33
PCI
33.33
33.66
B L60 120Z/100M
1 2
1608
+80-20% +80-20%
16V 16V
C253 C255
0.1U 1000P
0402 0402
+80-20% 10%
16V 50V
6
GND0
11
GND1
15
GND2
28
GND3
21
N/C0
18
N/C1
9
N/C2
ICS93772
SSOP28A
CLKT3
17
CLKC3
16
CLKT4
24
CLKC4
25
CLKT5
26
CLKC5
27
R253 1
R254 1
R252 1
R251 1
R249 1
R258 1
2 0_DFS 0402CLK_DDR3
2 0_DFS 0402CLK_DDR3#
2 0_DFS 0402CLK_DDR4
2 0_DFS 0402CLK_DDR4#
2 0_DFS 0402CLK_DDR5
2 0_DFS 0402CLK_DDR5#
CLK_DDR3 [9]
CLK_DDR3# [9]
CLK_DDR4 [9]
CLK_DDR4# [9]
CLK_DDR5 [9]
CLK_DDR5# [9]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
1
1
0
1
0
1
0
1
103.00
100.00
133.33
134.65
137.33
133.33
103.00
100.00
133.33
134.65
137.33
133.33
137.33
133.33
133.33
134.65
137.33
133.33
68.67
66.67
66.66
67.32
68.66
66.67
34.33
33.33
33.33
33.66
34.33
33.33
B
0 1 0 0 0 200.00 200.00 133.33 66.67 33.33
0 1 0 0 1 201.98 201.98 134.65 67.33 33.66
0 1 0 1 0 206.00 206.00 137.33 68.67 34.33
0 1 0 1 1 200.00 200.00 133.33 66.67 33.33
PLACE AT CLK SIDE
+3VS
0 1 1 0 0 166.66 166.66 133.33 66.66 33.33
1
2
1
2
E C
1
2
1
2
1
2
E C
FS0
FS4
1
2
1
2
1
2
1
2
1
2
1 2
1
2
1
2
1
2
1
2
1 2
R209
10K/NA
0402
1
2
1
R218
10K/NA
0402
2
1
R227
1K
0402
1%
2
R226
1K
0402
1%
1
2
X1
6
X2
7
1
2
FS3
R216 10K
1
0402
2 BSEL1
BSEL1 [4]
HCLK_CPU
HCLK_CPU#
C31 1
C30 1
2 10P
2 10P
0402
0402
FS2
R213 10K
1
0402
2 BSEL0
BSEL0 [4]
HCLK_SISM661FX C147 1
HCLK_SISM661FX# C139 1
2 10P/NA 0402
2 10P/NA 0402
1
2
BF_OUT
R0C
C229 1 2 10P 0402
A
HCLK_SISM661FX
HCLK_SISM661FX#
R164 1
R165 1
2 49.9
2 49.9
0402 1%
0402 1%
1
1
0
0
1
1
1
1
0
1
142.66
146.66
142.66
146.66
142.66
146.66
71.33
73.33
35.66
36.66
A
HCLK_CPU
HCLK_CPU#
R166 1
R167 1
2 49.9
2 49.9
0402 1%
0402 1%
1
1
1
1
0
0
0
0
0
1
200.40
210.00
200.40
210.00
133.60
140.00
66.79
69.99
33.40
35.00
1 1 0 1 0 214.00 214.00 142.66 71.33 35.66
1 1 0 1 1 220.00 220.00 146.66 73.33 36.66
1 1 1 0 0 166.99 166.99 133.60 66.79 33.40
1 1 1 0 1 174.99 174.99 140.00 69.99 35.00
1
1
1
1
1
1
1
1
0
1
178.33
183.33
178.33
183.33
142.66
146.66
71.33
73.33
35.66
36.66
Title
Size
Clock Generator/Buffer
Document
Number 411682900001
Rev
R06
Date: Monday, April 12, 2004
Sheet 11 of 28
8
7
6
5
4
3
2
1
G
D
S
1
2
G
D
S
4
0
0
1
1
1
0
3
1
168.31
168.31
For ICS952011
134.65
67.32
1 1 1 166.66 166.66 133.33 66.66
33.66
0 1 1 1 0 171.66 171.66 137.33 68.66 34.33
33.33
1 0 0 0 0 100.20 100.02 133.60 66.79 33.40
1 0 0 0 1 105.00 105.00 140.00 69.99 35.00
1 0 0 1 0 107.00 107.00 142.66 71.33 35.66
1 0 0 1 1 110.00 110.00 146.66 73.33 36.66
1 0 1 0 0 133.60 133.60 133.60 66.79 33.40
1 0 1 0 1 140.00 140.00 140.00 69.99 35.00
2
NON USE
NON USE
1