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CAD/CAM/CAE : electronic design automation, 1992 - Archive Server

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y at least another 50 percent in 1991. We<br />

expect the market to reach 80 million this<br />

year. By 1996, the market should peak at<br />

approximately 180 million.<br />

Design Verification in tlie Top-Down Design Era<br />

According to our most recent research, the<br />

market cites simulation as the most important<br />

weapon in its computer-aided engineering<br />

(<strong>CAE</strong>) arsenal. On a scale of one to five, with<br />

five being "most important" and one being<br />

"least important," the market assigns an average<br />

rating of 4.6 to simulation. In fact, the<br />

results of our research show that 69 percent<br />

of the market assigns it a 5. This bodes well<br />

for the future opportunities in the simulation<br />

arena, although rigorous price competition<br />

among the myriad of suppliers will undoubtedly<br />

limit revenue growtili.<br />

Despite the market's desire for simulation,<br />

the simulation market has remained relatively<br />

flat over the past few years. The market<br />

grew a negligible amoimt from 1989 to 1990<br />

(see Figure 4). Preliminary estimates for 1991<br />

<strong>CAD</strong>/<strong>CAM</strong>/<strong>CAE</strong>—Electronic Design Automation Applications<br />

indicate that again the market experienced<br />

little—if any—growth in 1991. Why?<br />

We have tmcovered several factors contributing<br />

to the market's sluggish performance. First, in<br />

recent years, only Cadence's Verilog XL simulator<br />

received strong market puU. Initially, the<br />

product's appeal was driven by its exceptional<br />

gate-level performance. Market pull increased<br />

as leading edge <strong>design</strong>ers began using the<br />

Verilog HDL for top-down <strong>design</strong>. Competitors<br />

in the simiilation market have been tmable to<br />

match Verilog XL's success primarily because<br />

the products lacked any or all of the<br />

following:<br />

• Fast gate-level execution speed<br />

• Mixed-level simulation capabilities<br />

• Strong modeling/<strong>design</strong> language<br />

• Standard modeling/<strong>design</strong> language (such as<br />

Verilog HDL or VHDL)<br />

• ASIC Ubrary support<br />

Figure 4<br />

Historical and Projected Growth of Worldwide Software Simulation Market<br />

Millions of Dollars<br />

350-<br />

^ Architectural Leval<br />

• Non-HDL<br />

n VHDL<br />

S Verilog<br />

1989 1990 1991 <strong>1992</strong> 1993 1994 1995 1996<br />

Notes Data does not include static timing analysis software.<br />

Data does not include application-specific hardware (for example, hardware accelerators, hardware<br />

modelers, logic emulators).<br />

Source: Dataquest (July <strong>1992</strong>) 6E001037 i<br />

July 27,<strong>1992</strong> ©<strong>1992</strong> Dataquest Incorporated C<strong>CAM</strong>-EDA-DP-9202

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