Hardware Manual - RTD Embedded Technologies, Inc.

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90 DM6425HR dataModule BDM-610010034 Rev C
Chapter 7 Interrupts This chapter explains software selectable interrupts, digital interrupts, and basic interrupt programming techniques. BDM-610010034 Rev C Chapter 7: Interrupts 91
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DM6425HR 32-Channel, 500 kHz PC/104
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DM6425 32-Channel, 500 kHz PC/104 d
Page 5 and 6:
Table of Contents Chapter 1 Introdu
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A/D Conversion Modes . . . . . . .
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D/A Calibration. . . . . . . . . .
Page 11 and 12:
Chapter 1 Introduction The DM6425HR
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DM6425HR Ordering Information The D
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Features The DM6425HR is a 12-bit,
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Analog-to-Digital Conversion The DM
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8254 Timer/Counters Two 8254 progra
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For More Information This manual an
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Chapter 2 DM6425HR Module Settings
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JS1 JS2 JS3 JS4 Figure 6 DM6425HR S
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Base Address Jumper (Factory Settin
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Chapter 3 Installing the dataModule
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Installation Considerations Conside
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External I/O Connections Figure 13
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Connecting the Analog Input Pins Th
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I/O CONNECTOR (CN3) SIGNAL SOURCE 1
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Chapter 4 I/O Mapping This chapter
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BDM-610010034 Rev C Chapter 4: I/O
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Page 49 and 50: BDM-610010034 Rev C Chapter 4: I/O
Page 51 and 52: BDM-610010034 Rev C Chapter 4: I/O
Page 53 and 54: Load Channel-Gain Table in Channel-
Page 55 and 56: This register sets up the trigger m
Page 57 and 58: BA + 0x0Ah (10): Digital Input FIFO
Page 59 and 60: BA + 0x18h (24): Digital I/O Port 0
Page 61 and 62: BA + 0x1Eh (30): Digital IRQ Status
Page 63 and 64: BA + 0x408h (1032): DAC3 Update Reg
Page 65 and 66: BA + 0x41Ch (1052): Read/Program Po
Page 67 and 68: BA + 0x800h/801h (2048/2049): Board
Page 69 and 70: Setting or clearing more than one b
Page 71 and 72: Chapter 5 A/D Conversions This chap
Page 73 and 74: Programming Channel, Gain, Input Ra
Page 75 and 76: Pause Bit Bit 11 is used as a pause
Page 77 and 78: With BA + 0x00h, bits 1 and 0 set t
Page 79 and 80: TO A/D CONVERTER A/D CONVERSION SEL
Page 81 and 82: Trigger Repeat Function Bit 13 in t
Page 83 and 84: Programmable Burst In this mode, a
Page 85 and 86: Voltage values for each bit will va
Page 87 and 88: Programming Steps The pacer clock i
Page 89 and 90: Using the Sample Counter to Create
Page 91 and 92: Mathematical formula for calculatin
Page 93 and 94: Chapter 6 Data Transfers Using DMA
Page 95 and 96: Allocating a DMA Buffer When using
Page 97 and 98: Setting the DMA Page Register Oddly
Page 99: Programming the DM6425HR for DMA On
Page 103 and 104: CLOCK DIGITAL INPUT IRQ OUT Figure
Page 105 and 106: If you find yourself intimidated by
Page 107 and 108: Restoring the Startup IMR and Inter
Page 109 and 110: Chapter 8 D/A Conversions This chap
Page 111 and 112: Chapter 9 Timer/Counters This chapt
Page 113 and 114: Each timer/counter has two inputs,
Page 115 and 116: Chapter 10 Digital I/O This chapter
Page 117 and 118: When using event interrupts, you ca
Page 119 and 120: Appendix A Example Programs This ap
Page 121 and 122: Special Considerations When manipul
Page 123 and 124: Appendix B Calibration This appendi
Page 125 and 126: A/D Calibration Two procedures are
Page 127 and 128: Below is a table listing the ideal
Page 129 and 130: Appendix C Specifications This appe
Page 131 and 132: Table 11 DM6425HR Specifications (c
Page 133 and 134: Appendix D I/O Connector Pin Assign
Page 135 and 136: Mating Connector Part Numbers Manuf
Page 137 and 138: Appendix E IDAN Dimensions and Pino
Page 139 and 140: IDAN-DM6425HR-62S External I/O Conn
Page 141 and 142: IDAN-DM6425HR-68S External I/O Conn
Page 143 and 144: Appendix F Limited Warranty RTD Emb
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Hardware Manual - RTD Embedded Technologies, Inc.

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