- Page 1 and 2: DM6425HR 32-Channel, 500 kHz PC/104
- Page 3 and 4: DM6425 32-Channel, 500 kHz PC/104 d
- Page 5 and 6: Table of Contents Chapter 1 Introdu
- Page 7 and 8: A/D Conversion Modes . . . . . . .
- Page 9 and 10: D/A Calibration. . . . . . . . . .
- Page 11 and 12: Chapter 1 Introduction The DM6425HR
- Page 13 and 14: DM6425HR Ordering Information The D
- Page 15 and 16: Features The DM6425HR is a 12-bit,
- Page 17 and 18: Analog-to-Digital Conversion The DM
- Page 19 and 20: 8254 Timer/Counters Two 8254 progra
- Page 21: For More Information This manual an
- Page 25 and 26: JS1 JS2 JS3 JS4 Figure 6 DM6425HR S
- Page 27 and 28: Base Address Jumper (Factory Settin
- Page 29 and 30: Chapter 3 Installing the dataModule
- Page 31 and 32: Installation Considerations Conside
- Page 33 and 34: External I/O Connections Figure 13
- Page 35 and 36: Connecting the Analog Input Pins Th
- Page 37 and 38: I/O CONNECTOR (CN3) SIGNAL SOURCE 1
- Page 39 and 40: Chapter 4 I/O Mapping This chapter
- Page 41 and 42: BDM-610010034 Rev C Chapter 4: I/O
- Page 43 and 44: BDM-610010034 Rev C Chapter 4: I/O
- Page 45 and 46: BDM-610010034 Rev C Chapter 4: I/O
- Page 47 and 48: BDM-610010034 Rev C Chapter 4: I/O
- Page 49 and 50: BDM-610010034 Rev C Chapter 4: I/O
- Page 51 and 52: BDM-610010034 Rev C Chapter 4: I/O
- Page 53 and 54: Load Channel-Gain Table in Channel-
- Page 55 and 56: This register sets up the trigger m
- Page 57 and 58: BA + 0x0Ah (10): Digital Input FIFO
- Page 59 and 60: BA + 0x18h (24): Digital I/O Port 0
- Page 61 and 62: BA + 0x1Eh (30): Digital IRQ Status
- Page 63 and 64: BA + 0x408h (1032): DAC3 Update Reg
- Page 65 and 66: BA + 0x41Ch (1052): Read/Program Po
- Page 67 and 68: BA + 0x800h/801h (2048/2049): Board
- Page 69 and 70: Setting or clearing more than one b
- Page 71 and 72: Chapter 5 A/D Conversions This chap
- Page 73 and 74:
Programming Channel, Gain, Input Ra
- Page 75 and 76:
Pause Bit Bit 11 is used as a pause
- Page 77 and 78:
With BA + 0x00h, bits 1 and 0 set t
- Page 79 and 80:
TO A/D CONVERTER A/D CONVERSION SEL
- Page 81 and 82:
Trigger Repeat Function Bit 13 in t
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Programmable Burst In this mode, a
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Voltage values for each bit will va
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Programming Steps The pacer clock i
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Using the Sample Counter to Create
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Mathematical formula for calculatin
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Chapter 6 Data Transfers Using DMA
- Page 95 and 96:
Allocating a DMA Buffer When using
- Page 97 and 98:
Setting the DMA Page Register Oddly
- Page 99 and 100:
Programming the DM6425HR for DMA On
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Chapter 7 Interrupts This chapter e
- Page 103 and 104:
CLOCK DIGITAL INPUT IRQ OUT Figure
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If you find yourself intimidated by
- Page 107 and 108:
Restoring the Startup IMR and Inter
- Page 109 and 110:
Chapter 8 D/A Conversions This chap
- Page 111 and 112:
Chapter 9 Timer/Counters This chapt
- Page 113 and 114:
Each timer/counter has two inputs,
- Page 115 and 116:
Chapter 10 Digital I/O This chapter
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When using event interrupts, you ca
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Appendix A Example Programs This ap
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Special Considerations When manipul
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Appendix B Calibration This appendi
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A/D Calibration Two procedures are
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Below is a table listing the ideal
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Appendix C Specifications This appe
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Table 11 DM6425HR Specifications (c
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Appendix D I/O Connector Pin Assign
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Mating Connector Part Numbers Manuf
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Appendix E IDAN Dimensions and Pino
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IDAN-DM6425HR-62S External I/O Conn
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IDAN-DM6425HR-68S External I/O Conn
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Appendix F Limited Warranty RTD Emb