Hardware Manual - RTD Embedded Technologies, Inc.

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CN3 (Right I/O Connector) DIFF. S.E. DIFF. S.E. AIN1+ AIN1 AIN2+ AIN2 AIN3+ AIN3 AIN4+ AIN4 AIN5+ AIN5 AIN6+ AIN6 AIN7+ AIN7 AIN8+ AIN8 AOUT 1 AOUT 2 ANALOG GND DATAMARKER 3 / P0.7 DATAMARKER 2 / P0.6 DATAMARKER 1 / P0.5 P0.4 P0.3 P0.2 P0.1 P0.0 TRIGGER IN EXT PCLK / STRB IN T/C OUT 1 / DIG IRQ EXT CLK +12 VOLTS -12 VOLTS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 AIN1- AIN9 AIN2- AIN10 AIN3- AIN11 AIN4- AIN12 AIN5- AIN13 AIN6- AIN14 AIN7- AIN15 AIN8- AIN16 ANALOG GND ANALOG GND ANALOG GND P1.7 P1.6 P1.5 P1.4 P1.3 P1.2 P1.1 P1.0 DIGITAL GND EXT GATE 1 T/C OUT 0 EXT GATE 0 +5 VOLTS DIGITAL GND PIN 1 PIN 49 PIN 2 PIN 50 CN4 (Left I/O Connector) DIFF. S.E. DIFF. S.E. AIN9+ AIN17 1 2 AIN9- AIN25 AIN10+ AIN18 3 4 AIN10- AIN26 AIN11+ AIN19 5 6 AIN11- AIN27 AIN12+ AIN20 7 8 AIN12- AIN28 AIN13+ AIN21 9 10 AIN13- AIN29 AIN14+ AIN15+ AIN16+ AIN22 AIN23 AIN24 11 12 13 14 15 16 AIN14- AIN30 AIN15- AIN31 AIN16- AIN32 AOUT 3 AOUT 4 ANALOG GND P2.7 P2.6 P2.5 P2.4 P2.3 P2.2 P2.1 P2.0 RESERVED RESERVED 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 ANALOG GND ANALOG GND ANALOG GND P3.7 P3.6 P3.5 P3.4 P3.3 P3.2 P3.1 P3.0 DIGITAL GND RESERVED T/C OUT 1 / DIG IRQ EXTERNAL INTERRUPT 1 43 44 45 46 T/C OUT 0 EXTERNAL INTERRUPT 2 +12 VOLTS -12 VOLTS 47 48 49 50 +5 VOLTS DIGITAL GND PIN 1 PIN 49 PIN 2 PIN 50 Figure 34 DM6425HR I/O Connectors Note +12 V at pin 47 and –12 V at pin 49 are available only if supplied by the computer bus. 124 DM6425HR dataModule BDM-610010034 Rev C
Mating Connector Part Numbers Manufacturer Part Number AMP 1-746094-0 3M 3425-7650 BDM-610010034 Rev C Appendix D: I/O Connector Pin Assignments 125
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DM6425HR 32-Channel, 500 kHz PC/104
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DM6425 32-Channel, 500 kHz PC/104 d
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Table of Contents Chapter 1 Introdu
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A/D Conversion Modes . . . . . . .
Page 9 and 10:
D/A Calibration. . . . . . . . . .
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Chapter 1 Introduction The DM6425HR
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DM6425HR Ordering Information The D
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Features The DM6425HR is a 12-bit,
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Analog-to-Digital Conversion The DM
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8254 Timer/Counters Two 8254 progra
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For More Information This manual an
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Chapter 2 DM6425HR Module Settings
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JS1 JS2 JS3 JS4 Figure 6 DM6425HR S
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Base Address Jumper (Factory Settin
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Chapter 3 Installing the dataModule
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Installation Considerations Conside
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External I/O Connections Figure 13
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Connecting the Analog Input Pins Th
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I/O CONNECTOR (CN3) SIGNAL SOURCE 1
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Chapter 4 I/O Mapping This chapter
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BDM-610010034 Rev C Chapter 4: I/O
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Page 45 and 46:
Page 47 and 48:
Page 49 and 50:
Page 51 and 52:
Page 53 and 54:
Load Channel-Gain Table in Channel-
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This register sets up the trigger m
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BA + 0x0Ah (10): Digital Input FIFO
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BA + 0x18h (24): Digital I/O Port 0
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BA + 0x1Eh (30): Digital IRQ Status
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BA + 0x408h (1032): DAC3 Update Reg
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BA + 0x41Ch (1052): Read/Program Po
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BA + 0x800h/801h (2048/2049): Board
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Setting or clearing more than one b
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Chapter 5 A/D Conversions This chap
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Programming Channel, Gain, Input Ra
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Pause Bit Bit 11 is used as a pause
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With BA + 0x00h, bits 1 and 0 set t
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TO A/D CONVERTER A/D CONVERSION SEL
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Trigger Repeat Function Bit 13 in t
Page 83 and 84: Programmable Burst In this mode, a
Page 85 and 86: Voltage values for each bit will va
Page 87 and 88: Programming Steps The pacer clock i
Page 89 and 90: Using the Sample Counter to Create
Page 91 and 92: Mathematical formula for calculatin
Page 93 and 94: Chapter 6 Data Transfers Using DMA
Page 95 and 96: Allocating a DMA Buffer When using
Page 97 and 98: Setting the DMA Page Register Oddly
Page 99 and 100: Programming the DM6425HR for DMA On
Page 101 and 102: Chapter 7 Interrupts This chapter e
Page 103 and 104: CLOCK DIGITAL INPUT IRQ OUT Figure
Page 105 and 106: If you find yourself intimidated by
Page 107 and 108: Restoring the Startup IMR and Inter
Page 109 and 110: Chapter 8 D/A Conversions This chap
Page 111 and 112: Chapter 9 Timer/Counters This chapt
Page 113 and 114: Each timer/counter has two inputs,
Page 115 and 116: Chapter 10 Digital I/O This chapter
Page 117 and 118: When using event interrupts, you ca
Page 119 and 120: Appendix A Example Programs This ap
Page 121 and 122: Special Considerations When manipul
Page 123 and 124: Appendix B Calibration This appendi
Page 125 and 126: A/D Calibration Two procedures are
Page 127 and 128: Below is a table listing the ideal
Page 129 and 130: Appendix C Specifications This appe
Page 131 and 132: Table 11 DM6425HR Specifications (c
Page 133: Appendix D I/O Connector Pin Assign
Page 137 and 138: Appendix E IDAN Dimensions and Pino
Page 139 and 140: IDAN-DM6425HR-62S External I/O Conn
Page 141 and 142: IDAN-DM6425HR-68S External I/O Conn
Page 143 and 144: Appendix F Limited Warranty RTD Emb
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