Hardware Manual - RTD Embedded Technologies, Inc.

Port 0, Bit Programmable Digital I/O
The eight Port 0 digital lines are individually set for input or output by writing to the Port 0 Direction Register at
BA + 0x1Ch. The input lines are read and the output lines are written at BA + 0x18h.
Direction Register:
For all bits:
0 = input
1 = output
D7 D6 D5 D4 D3 D2 D1 D0
P0.7 P0.6 P0.5 P0.4 P0.3 P0.2 P0.1 P0.0
Advanced Digital Interrupts: Mask and Compare Registers
The Port 0 bits support two Advanced Digital Interrupt modes. An interrupt can be generated when the data
read at the port matches the value loaded into the Compare Register. This is called a match interrupt. Or, an
interrupt can be generated whenever any bit changes state. This is an event interrupt. For either interrupt, bits
can be masked by setting the corresponding bit in the Mask Register high. In a digital interrupt mode, this masks
out selected bits when monitoring the bit pattern for a match or event. In normal operation where the Advanced
Digital Interrupt mode is not activated, the Mask Register can be used to preserve a bit’s state, regardless of the
digital data written to Port 0.
When using event interrupts, you can determine which bit caused an event interrupt to occur by reading the
contents latched into the Compare Register.
Port 1, Port Programmable Digital I/O
The direction of the eight Port 1 digital lines is programmed at BA + 0x1Eh, bit 2. These lines are configured as
all inputs or all outputs, with their states read and written at BA + 0x1Ah.
Port 2, Bit Programmable Digital I/O
The eight Port 2 digital lines are individually set for input or output by writing to the Port 2 Direction Register at
BA + 0x41Ch. The input lines are read and the output lines are written at BA + 0x418h.
Direction Register:
For all bits:
0 = input
1 = output
D7 D6 D5 D4 D3 D2 D1 D0
P2.7 P2.6 P2.5 P2.4 P2.3 P2.2 P2.1 P2.0
Advanced Digital Interrupts: Mask and Compare Registers
The Port 2 bits support two Advanced Digital Interrupt modes. An interrupt can be generated when the data
read at the port matches the value loaded into the Compare Register. This is called a match interrupt. Or, an
interrupt can be generated whenever any bit changes state. This is an event interrupt. For either interrupt, bits
can be masked by setting the corresponding bit in the Mask Register high. In a digital interrupt mode, this masks
out selected bits when monitoring the bit pattern for a match or event. In normal operation where the Advanced
Digital Interrupt mode is not activated, the Mask Register can be used to preserve a bit’s state, regardless of the
digital data written to Port 2.
106 DM6425HR dataModule BDM-610010034 Rev C