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Op Amps for Everyone - The Repeater Builder's Technical ...

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Input Common-Mode Range<br />

V IO<br />

– Input Offset Voltage – µ V<br />

100<br />

80<br />

60<br />

40<br />

20<br />

0<br />

–20<br />

–40<br />

–60<br />

–80<br />

TLV245X<br />

V CC =5 V<br />

T A = 25° C<br />

–100<br />

0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5<br />

V IC – Common-Mode Input Voltage – V<br />

Figure 18–6. Input Offset Voltage Changes with Input Common-Mode Voltage<br />

When both transistors are conducting current the input bias currents have a tendency to<br />

cancel, so in the range of ±1 V, the bias current is extremely low even when bipolar transistors<br />

are used to make the op amp. Above this range, the PNP differential amplifier cuts<br />

off so the full bias current requirement of the NPN transistor becomes apparent. <strong>The</strong> same<br />

action happens below this range when the NPN differential amplifier cuts off. Notice that<br />

the PNP bias current is significantly larger than the NPN bias current; this is expected because<br />

NPN transistors have better gain characteristics than PNP transistors. <strong>The</strong> baseemitter<br />

voltage of the NPN and PNP transistors is well matched because the magnitude<br />

of the input offset voltage at the extremes is almost equal.<br />

<strong>The</strong> bias current and offset voltage variation with input signal amplitude cause errors and<br />

distortion of the input signal. Inserting a resistance equal to the parallel combination of<br />

R F and R G into the positive op amp lead minimizes the effect of input bias current. <strong>The</strong><br />

resistor, R P , has the same voltage drop across it that the parallel combination of R F and<br />

R G has, hence the bias current is converted to a common-mode voltage. <strong>The</strong> commonmode<br />

voltage is normally in the µV-range because I IB is in the fractional nA range and R P<br />

is in the tens of KΩ. <strong>The</strong> CMMR is approximately 60 dB, so the input bias current effect<br />

is reduced to the nV range where it is insignificant compared to the offset voltage. <strong>The</strong><br />

input offset current is multiplied by R P , and it shows up as an input error. If the design can’t<br />

tolerate these errors it is wise to switch to a CMOS op amp because its input currents are<br />

in the pA range.<br />

Another type of error creeps in when complementary differential amplifiers are used to<br />

obtain DR, and this error is results from the different gain of the PNP and NPN transistors.<br />

18-10

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