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Op Amps for Everyone - The Repeater Builder's Technical ...

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esistor ladder, 14-2 to 14-4<br />

resistor ladder circuit, 14-2<br />

RF application budget, 14-10<br />

selection, 13-6 to 13-10<br />

settling time, 14-16 to 14-18<br />

sigma-delta , 14-5 to 14-7<br />

SINAD, 14-14<br />

single-supply operation, 14-22<br />

specifications, 14-2 to 14-6<br />

spurious free dynamic range, 14-15<br />

THD, 14-8 to 14-10, 14-14<br />

types, 14-2<br />

voltage booster circuit, 14-21, 14-22<br />

weighted resistor, 14-3 to 14-5<br />

weighted resistor circuit, 14-3<br />

DAC current sink, actuator interface circuit, 18-19<br />

DAC current source, actuator interface circuit, 18-17<br />

Damping ratio, graph, 7-4<br />

DC loads, DAC, 14-1 to 14-3<br />

DC offsets, DAC, 14-22 to 14-24<br />

DC parameters, DAC, 14-10 to 14-14<br />

Deglitch circuit, DAC, 14-17<br />

Design, op amp circuit, 12-16 to 12-23<br />

Design hints, 16-47 to 16-55<br />

Design procedure, 12-11 to 12-13<br />

Differential amp, closed loop response, 13-19<br />

Differential input voltage range, parameter, 11-11<br />

Differential nonlinearity error, 14-12 to 14-14<br />

graph, 14-13<br />

Differential op amp, 3-6 to 3-8, 6-8 to 6-10<br />

circuit, 3-6, 6-8<br />

common-mode input signal circuit, 3-7<br />

noise, 10-18<br />

Differential output drive, from single-ended circuit,<br />

13-18<br />

Differential voltage amplification, parameter, 11-13<br />

Digital plane placement, 17-8<br />

Distortion, total harmonic, 11-18 to 11-20<br />

Dominant-pole compensation, 7-9 to 7-13<br />

graph, 7-11<br />

Dominant-pole compensation circuit, bode plot, 7-11<br />

Dual IF receiver, block diagram, 13-4<br />

Dual supply op amp, vs single supply, 4-1 to 4-4<br />

Dual-supply filter, circuit, 16-47<br />

Dynamic range<br />

DAC, 14-9 to 14-11<br />

low-voltage op amp designs, 18-3 to 18-6<br />

E<br />

Effective number of bits, DAC, 14-14<br />

Elapsed time<br />

graph <strong>for</strong> TL07x, 7-5<br />

graph <strong>for</strong> TL08x, 7-6<br />

ENOB, DAC, 14-14<br />

Equivalent input noise, parameter, 11-17 to 11-19<br />

Error sources, op amp, 18-4<br />

External compensation, 7-8<br />

F<br />

Fairchild<br />

Robert J. Wilder, 1-3<br />

uA709, 1-3<br />

Feedback, 5-6 to 5-8<br />

Bode analysis, 5-7 to 5-13<br />

Wien bridge oscillator circuit, 15-12<br />

Feedback capacitance<br />

Bode plot, 8-13<br />

compensation, 8-13 to 8-15<br />

current feedback amp, 8-12 to 8-14<br />

Feedback circuit, block diagram math, 5-3<br />

Feedback loop, broken circuit, 6-7<br />

Feedback network, complex, 3-7 to 3-9<br />

Feedback resistor<br />

graph, 8-10<br />

selection, 8-9 to 8-12<br />

Feedback system, block diagram, 6-2<br />

Filter<br />

anti-aliasing, 13-11 to 13-13<br />

band reject circuit, 5-9<br />

band reject curve, 5-10<br />

capacitor selection, 16-50 to 16-53<br />

cascading filter stages, 16-12<br />

characteristics of reconstruction, 13-14<br />

coefficients, 16-55 to 16-63<br />

component values, 16-52<br />

DAC recontracting, 13-13 to 13-16<br />

description, 16-1 to 16-3<br />

dual-supply circuit, 16-47<br />

low pass fundamentals, 16-2 to 16-11<br />

low-pass design, 16-11 to 16-21<br />

op amp selection, 16-53 to 16-55<br />

quality factor, 16-9 to 16-11<br />

Index-5

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