Star-Hspice Quick Reference Guide

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Elements Name (Alias) Unit Default Description AREA - - The default area multiplier HDIF m 0 Distance of the heavily diffused or low resistance region from source or drain contact edge to lightly doped region IS amp 1.0e-14 Gate junction saturation current L m 0.0 Default length of FET LDEL m 0.0 Difference between drawn and actual or optical device length LDIF m 0 Width of the lightly doped region from heavily doped region to transistor edge N - 1.0 Emission coefficient for gate-drain and gatesource diodes RD ohm 0.0 Drain ohmic resistance RG ohm 0.0 Gate resistance 8-4 Star-Hspice Quick Reference Guide
JFET Model Parameters Name (Alias) Unit Default Description RS ohm 0.0 Source ohmic resistance RSH ohm/sq 0 Heavily doped region, sheet resistance RSHG ohm/sq 0 Gate sheet resistance RSHL ohm/sq 0 Lightly doped region, sheet resistance W m 0.0 Default width of FET WDEL m 0.0 The difference between drawn & actual or optical device width See “Gate Diode DC Parameters” in the Star-Hspice Manual. Gate Capacitance LEVEL 1, 2, and 3 Parameters Name (Alias) Unit Default Description CAPOP - 0.0 Capacitor model selector CALPHA ALPHA - Saturation factor for capacitance model (CAPOP=2 only) Star-Hspice Quick Reference Guide 8-5
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Star-Hspice Quick Reference Guide R
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AGREEMENT WITH AVANT! CORPORATION O
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1- Chapter 1 Introduction This Quic
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Input and Output Files Input and Ou
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.PARAMETER .END Input and Output Fi
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Input and Output Files tnom vt(t) v
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2- Chapter 2 Discrete Device Librar
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3- Chapter 3 Passive Devices and In
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n1 n2 R Rxxx SCALE TC1 TC2 user-def
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Capacitors M W L DTEMP C=‘equatio
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IC L=inductance L=‘equation’ LT
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Independent Source Element Lzzz Nam
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Pulse Source Function General Form
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Single-Frequency FM Source Function
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Independent Sources TIME tr v1 v2
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4- Chapter 4 Transmission Lines Sta
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5- Chapter 5 IBIS Conventions The t
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Buffers + [interpol={1|2}] + [ramp_
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Buffers I/O Open Drain, I/O Open Si
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Differential Pins + [buffer={13|io_
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6- Chapter 6 Diodes The topics cove
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Junction Model Statement WP Width o
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Junction Model Parameters Name (Ali
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Junction Cap Model nodeplus nminus
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Junction Cap Model Name (Alias) Uni
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Junction Cap Model Name (Alias) Uni
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Temperature Effects Temperature Eff
Page 55 and 56: Fowler-Nordheim Diode Name (Alias)
Page 57 and 58: Fowler-Nordheim Diode Name (Alias)
Page 59 and 60: 7- Chapter 7 BJT Element The topics
Page 61 and 62: BJT Model Parameters mname NPN pnam
Page 63 and 64: BJT Model Parameters Low-Current Be
Page 65 and 66: See “Using Parasitic Resistance P
Page 67 and 68: BJT Model Parameters Transit Time P
Page 69 and 70: LEVEL 6 Philips Bipolar Model LEVEL
Page 71 and 72: LEVEL 6 Philips Bipolar Model Param
Page 77 and 78: LEVEL 6 Philips Bipolar Model Flags
Page 79 and 80: Avalanche Model Parameters - Level
Page 81 and 82: Base-Emitter Capacitances - Level 5
Page 83 and 84: Transit Time Parameters - Level 504
Page 85 and 86: LEVEL 6 Philips Bipolar Model Noise
Page 87 and 88: LEVEL 8 HiCUM Model LEVEL - 8 HiCUM
Page 89 and 90: LEVEL 8 HiCUM Model BE Depletion Ca
Page 91 and 92: LEVEL 8 HiCUM Model Critical Curren
Page 93 and 94: LEVEL 8 HiCUM Model Parameter Unit
Page 95 and 96: LEVEL 8 HiCUM Model BE Tunneling Pa
Page 97 and 98: LEVEL 8 HiCUM Model Substrate Trans
Page 103 and 104: 8- Chapter 8 Elements This chapter
Page 105: JFET and MESFET Model Statements JF
Page 109 and 110: JFET Model Parameters Name (Alias)
Page 111 and 112: JFET Model Parameters Name (Alias)
Page 113 and 114: 9- Chapter 9 MOSFET Introduction Th
Page 115 and 116: MOSFET Element Statement RDC RSC W
Page 117 and 118: MOSFET Element Statement Capacitanc
Page 119 and 120: MOSFET Element Statement Name (Alia
Page 125 and 126: Charge Conservation Parameters (CAP
Page 129 and 130: 10- Chapter 10 MOSFET Models This c
Page 131 and 132: Model Table LEVEL MOSFET Model Desc
Page 133 and 134: Model Table LEVEL MOSFET Model Desc
Page 135 and 136: LEVEL 47 BSIM3 Version 2 MOS Model
Page 137 and 138: LEVELs 49 and 53 BSIM3v3 MOS Models
Page 139 and 140: LEVEL 54 BSIM 4.0 Model • Since d
Page 141 and 142: LEVEL 55 EPFL-EKV MOSFET Model LEVE
Page 143 and 144: LEVEL 57 UC Berkeley BSIM3-SOI Mode
Page 151 and 152: LEVEL 58 University of Florida SOI
Page 153 and 154: LEVEL 59 UC Berkeley BSIM3-SOI FD M
Page 155 and 156: LEVEL 60 UC Berkeley BSIM3-SOI DD M
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LEVEL 62 RPI Poli-Si TFT Model •
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11- Chapter 11 Behavior Macromodeli
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G Elements Voltage Controlled Curre
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Voltage and Current Controlled Elem
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F Element Parameters Voltage and Cu
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12- Chapter 12 Controlling Input Th
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General Control Options Option NOEL
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General Control Options Interface O
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General Control Options Error Optio
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Model Analysis Options Option DEFNR
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Model Analysis Options Option RELMO
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Model Analysis Options Option DCSTE
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Model Analysis Options Option PZTOL
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Model Analysis Options Option RELTO
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Model Analysis Options Option RELVA
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Statements Statements Star-Hspice s
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Statements pnami colnum fileout pva
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Statements elname Element name that
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.LIB Library File Definition Statem
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Statements VERSION Star-Hspice vers
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.TITLE Statement See “Title of Si
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13- Chapter 13 Analyzing Data You c
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DC Analysis incr1 … MODEL MONTE=v
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AC Analysis See “.TF Statement
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stop SWEEP TEMP type var .DISTO Sta
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Small-Signal Network Analysis .NET
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Double-Point Analysis General Form
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tstop1… type UIC var FFT Analysis
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Worst Case Analysis Numerical Integ
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Worst Case Analysis AC Sweep Genera
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14- Chapter 14 Optimizing Data This
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.MODEL Statement Syntax General For
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Laplace Transforms Voltage Gain H(s
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15- Chapter 15 Output Format The to
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Graphing Results in AvanWaves Setup
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Print Commands Graph Commands A, D
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See “.GRAPH Statement” in the S
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Print Commands Target General Form
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Print Commands out_var result TO WE
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Print Commands YMAX If the absolute
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DC and Transient Output out_var(1,2
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AC Analysis Output AC Analysis Outp
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Element Template Output ZIN ZOUT In
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Element Template Listings Name Alia
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Element Template Listings Independe
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