Xilinx PG054 7 Series FPGAs Integrated Block for PCI Express ...

Transaction InterfaceTable 2-16:cfg_msg_received_deassert_inta Output Received Deassert_INTA Message: Active High. Indicatesthat the core received a Deassert_INTA Message. Validonly along with assertion of cfg_msg_received. TheRequester ID of this Message Transaction is provided oncfg_msg_data[15:0].cfg_msg_received_deassert_intb Output Received Deassert_INTB Message: Active High. Indicatesthat the core received a Deassert_INTB Message. Validonly along with assertion of cfg_msg_received. TheRequester ID of this Message Transaction is provided oncfg_msg_data[15:0].cfg_msg_received_deassert_intc Output Received Deassert_INTC Message: Active High. Indicatesthat the core received a Deassert_INTC Message. Validonly along with assertion of cfg_msg_received. TheRequester ID of this Message Transaction is provided oncfg_msg_data[15:0].cfg_msg_received_deassert_intd Output Received Deassert_INTD Message: Active High. Indicatesthat the core received a Deassert_INTD Message. Validonly along with assertion of cfg_msg_received. TheRequester ID of this Message Transaction is provided oncfg_msg_data[15:0].cfg_msg_received_pm_pme Output Received PME Message: Indicates that a PowerManagement Event Message was received on the link.Interrupt Interface SignalsTable 2-17 defines the Interrupt interface signals.Table 2-17:Role-Specific Configuration Interface Signals: Root Port (Cont’d)Name Direction DescriptionConfiguration Interface Signals: Interrupt Interface - Endpoint OnlyName Direction Descriptioncfg_interrupt Input Configuration Interrupt: Interrupt-request signal. TheUser Application can assert this input to cause theselected interrupt message type to be transmitted bythe core. The signal should be held Low untilcfg_interrupt_rdy is asserted.cfg_interrupt_rdy Output Configuration Interrupt Ready: Interrupt grant signal.The simultaneous assertion of cfg_interrupt_rdyand cfg_interrupt indicates that the core hassuccessfully transmitted the requested interruptmessage.cfg_interrupt_assert Input Configuration Legacy Interrupt Assert/Deassert Select:Selects between Assert and Deassert messages forLegacy interrupts when cfg_interrupt is asserted.Not used for MSI interrupts.Value Message Type0 Assert1 Deassert7 Series Integrated Block for PCIe (v1.6) www.xilinx.com 35PG054 July 25, 2012Product Specification